Re: [PATCH] riscv: dts: fu740: fix cache-controller interrupts
From: David Abdurachmanov <hidden>
Date: 2021-06-15 11:55:04
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On Sun, Jun 13, 2021 at 3:51 AM Palmer Dabbelt [off-list ref] wrote:
From: David Abdurachmanov <redacted> The order of interrupt numbers is incorrect. The order for FU740 is: DirError, DataError, DataFail, DirFail From SiFive FU740-C000 Manual: 19 - L2 Cache DirError 20 - L2 Cache DirFail 21 - L2 Cache DataError 22 - L2 Cache DataFail Signed-off-by: David Abdurachmanov <redacted> Signed-off-by: Palmer Dabbelt <redacted> --- Olof pointed me to https://raw.githubusercontent.com/sifive/meta-sifive/2021.03/recipes-kernel/linux/files/unmatched/0009-riscv-dts-fu740-fix-cache-controller-interrupts.patch This appears necessary to make the FU740 function properly, but hasn't been posted on the mailing lists. Given the age I'm hoping it's just slipped through the cracks somewhere, but I figured I'd send it out to give David a chance to comment if there's a different plan.
There are a bunch of stuff that need to be cleaned up and synced with U-Boot copy of DT for Unmatched. This patch is required to boot. There are others patches that do: - Change compat string for CPUs to report U74MC instead of bullet0. - Change memory to 16GB from 8GB. - Change regulator values to match what's in the Rev3 board. - Add PWM LEDs nodes. - Add a gpio-poweroff node (this could change depending on what OpenSBI wants to do). And most likely the "a00" part should go away from compat strings and filenames. "A00" was most likely a copy & paste from FU540 / Unleashed board. Regulator block probably could also go away from DT as Linux doesn't need to touch it, basically it just runs whatever is configured in OTP. I believe the current DT that landed was written for Rev1, but a few revisions happened afterwards. You can only buy Rev3 boards. I wonder if we should modify the existing DT file and rename it "hifive-unmatched.dts" + new compat strings to remove "A00".
quoted hunk ↗ jump to hunk
--- arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi index 8eef82e4199f..abbb960f90a0 100644 --- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi@@ -273,7 +273,7 @@ ccache: cache-controller@2010000 { cache-size = <2097152>; cache-unified; interrupt-parent = <&plic0>; - interrupts = <19 20 21 22>; + interrupts = <19 21 22 20>; reg = <0x0 0x2010000 0x0 0x1000>; }; gpio: gpio@10060000 { --2.32.0.272.g935e593368-goog _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv