Re: [RFC PATCH v1 01/10] RISC-V: Clear SIP bit only when using SBI IPI operations
From: Bin Meng <hidden>
Date: 2021-06-14 13:34:30
Also in:
linux-riscv, lkml
On Sun, Jun 13, 2021 at 12:07 AM Anup Patel [off-list ref] wrote:
The software interrupt pending (i.e. [M|S]SIP) bit is writeable for S-mode but readonly for M-mode so we clear this bit only when using
nits: read-only
SBI IPI operations. Signed-off-by: Anup Patel <redacted> --- arch/riscv/kernel/sbi.c | 8 +++++++- arch/riscv/kernel/smp.c | 2 -- 2 files changed, 7 insertions(+), 3 deletions(-)
Otherwise, Reviewed-by: Bin Meng <redacted>