[PATCH v6 7/8] arm64: dts: rockchip: Add SFC to RK3308
From: Jon Lin <hidden>
Date: 2021-06-08 02:33:16
Also in:
linux-arm-kernel, linux-rockchip, linux-spi, lkml
Subsystem:
the rest · Maintainer:
Linus Torvalds
From: Chris Morgan <redacted> Add a devicetree entry for the Rockchip SFC for the RK3308 SOC. Signed-off-by: Chris Morgan <redacted> Signed-off-by: Jon Lin <redacted> --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None arch/arm64/boot/dts/rockchip/rk3308.dtsi | 37 ++++++++++++++++++++++++ 1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 0c5fa9801e6f..f40feb08f3cf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi@@ -637,6 +637,17 @@ status = "disabled"; }; + sfc: spi@ff4c0000 { + compatible = "rockchip,rk3308-sfc", "rockchip,rk3036-sfc"; + reg = <0x0 0xff4c0000 0x0 0x4000>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_SFC>, <&cru SCLK_SFC>; + clock-names = "hclk_sfc", "clk_sfc"; + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>; + pinctrl-names = "default"; + status = "disabled"; + }; + cru: clock-controller@ff500000 { compatible = "rockchip,rk3308-cru"; reg = <0x0 0xff500000 0x0 0x1000>;
@@ -910,6 +921,32 @@ }; }; + serial_flash { + sfc_bus4: sfc-bus4 { + rockchip,pins = + <3 RK_PA0 3 &pcfg_pull_none>, + <3 RK_PA1 3 &pcfg_pull_none>, + <3 RK_PA2 3 &pcfg_pull_none>, + <3 RK_PA3 3 &pcfg_pull_none>; + }; + + sfc_bus2: sfc-bus2 { + rockchip,pins = + <3 RK_PA0 3 &pcfg_pull_none>, + <3 RK_PA1 3 &pcfg_pull_none>; + }; + + sfc_cs0: sfc-cs0 { + rockchip,pins = + <3 RK_PA4 3 &pcfg_pull_none>; + }; + + sfc_clk: sfc-clk { + rockchip,pins = + <3 RK_PA5 3 &pcfg_pull_none>; + }; + }; + gmac { rmii_pins: rmii-pins { rockchip,pins =
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2.17.1