27.04.2021 21:30, Krishna Reddy пишет:

quoted

Is it always safe to enable SMMU ASID in a middle of a DMA request made by a
memory client?

From MC point of view, It is safe to enable and has been this way from many years in downstream code for display engine.
It doesn't impact the transactions that have already bypassed SMMU before enabling SMMU ASID. 
Transactions that are yet to pass SMMU stage would go through SMMU once SMMU ASID is enabled and visible.

Hello,

Thank you for the answer. Could you please give more information about:

1) Are you on software or hardware team, or both?

2) Is SMMU a third party IP or developed in-house?

3) Do you have a direct access to HDL sources? Are you 100% sure that
hardware does what you say?

4) What happens when CPU writes to ASID register? Does SMMU state
machine latch ASID status (making it visible) only at a single "safe" point?