On Wed, Apr 21, 2021 at 07:51:48AM -0500, Rob Herring wrote:

On Tue, 20 Apr 2021 23:28:33 -0500, Samuel Holland wrote:

quoted

The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
Represent this by attaching the reset line to a glue layer device.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 .../usb/allwinner,sun50i-h6-dwc3.yaml         | 75 +++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

I dropped these patches then

Maxime