Hi Rob

On 2021/3/10 11:01, Rob Herring wrote:

On Tue, Mar 09, 2021 at 09:56:29AM +0800, Shawn Lin wrote:

quoted

This patch adds rockchip support in sdhci-of-dwcmhsc.yaml

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

.....

quoted

+
+  rockchip,txclk-tapnum:
+    description: Specify the number of delay for tx sampling.
+    $ref: /schemas/types.yaml#/definitions/uint32

Constraints for this? 0 - 2^32 is okay?

Oh, actually this is a 4-bit value, and the reg map looks like:

7:5 RO reserved
--------------------
4:0 RW tapnum

So I think it should constraints for u8?

quoted

+
  
  required:
    - compatible

@@ -49,6 +62,17 @@ unevaluatedProperties: false
  
  examples:
    - |
+    mmc@fe310000 {
+      compatible = "rockchip,dwcmshc-sdhci";
+      reg = <0xfe310000 0x10000>;
+      interrupts = <0 25 0x4>;
+      clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>;
+      clock-names = "core", "bus", "axi", "block", "timer";
+      bus-width = <8>;
+      #address-cells = <1>;
+      #size-cells = <0>;
+    };
+  - |
      mmc@aa0000 {
        compatible = "snps,dwcmshc-sdhci";
        reg = <0xaa000 0x1000>;

-- 
2.7.4