Re: [PATCH 2/2] arm64: dts: msm8996: Mark the GPU's SMMU as an adreno one.
From: Bjorn Andersson <hidden>
Date: 2021-03-30 03:24:43
Also in:
dri-devel, linux-arm-kernel, linux-arm-msm, lkml
On Fri 26 Mar 18:13 CDT 2021, Eric Anholt wrote:
This enables the adreno-specific SMMU path that sets HUPCF so (user-managed) page faults don't wedge the GPU. Signed-off-by: Eric Anholt <redacted>
Acked-by: Bjorn Andersson <redacted> @Will, can you pick this together with the driver patch? (So that they land in order) Regards, Bjorn
quoted hunk ↗ jump to hunk
--- We've been seeing a flaky test per day or so in Mesa CI where the kernel gets wedged after an iommu fault turns into CP errors. With this patch, the CI isn't throwing the string of CP errors on the faults in any of the ~10 jobs I've run so far. arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 6de136e3add9..432b87ec9c5e 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi@@ -1127,7 +1127,7 @@ cci_i2c1: i2c-bus@1 { }; adreno_smmu: iommu@b40000 { - compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; + compatible = "qcom,msm8996-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2"; reg = <0x00b40000 0x10000>; #global-interrupts = <1>;-- 2.31.0