On Tue, Mar 23, 2021 at 10:33:15PM +0100, Martin Blumenstingl wrote:

 Hi Neil,

On Mon, Mar 15, 2021 at 9:37 AM Neil Armstrong [off-list ref] wrote:

quoted

On most of the Amlogic SoCs, the first UART controller in the "Everything-Else"
power domain has 128bytes of RX & TX FIFO, so add an optional property to describe

do we still need wrapping of long lines in commit messages?
if so I think the line above is too long

quoted

a different FIFO size from the other ports (64bytes).

Signed-off-by: Neil Armstrong <redacted>

Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

one additional note below

quoted

---
 .../devicetree/bindings/serial/amlogic,meson-uart.yaml      | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
index 75ebc9952a99..e0a742112783 100644
--- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml

@@ -55,6 +55,12 @@ properties:
       - const: pclk
       - const: baud

+
+  amlogic,uart-fifosize:
+    description: The fifo size supported by the UART channel.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [64, 128]

I personally think this is generic enough to be described as fifo-size
(as it's done in Documentation/devicetree/bindings/serial/8250.yaml)
let's wait and hear what Rob thinks

Yes.