On Mon, 8 Mar 2021 12:05:46 +0530, Kishon Vijay Abraham I wrote:

AM64 uses the same PCIe controller as in J7200, however AM642 EVM
doesn't have a clock generator (unlike J7200 base board). Here
the clock from the SERDES has to be routed to the PCIE connector.
This series provides an option for the pci-j721e.c driver to
drive reference clock output to the connector.

v1 of the patch series can be found @ [1]
v2 of the patch series can be found @ [2]
v3 of the patch series can be found @ [3]

[...]

Applied to pci/cadence, thanks!

[1/4] dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector
      https://git.kernel.org/lpieralisi/pci/c/f9875d1a36
[2/4] dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC
      https://git.kernel.org/lpieralisi/pci/c/3201f355e9
[3/4] dt-bindings: PCI: ti,j721e: Add endpoint mode dt-bindings for TI's AM64 SoC
      https://git.kernel.org/lpieralisi/pci/c/6b7d5394c2
[4/4] PCI: j721e: Add support to provide refclk to PCIe connector
      https://git.kernel.org/lpieralisi/pci/c/49e0efdce7

Thanks,
Lorenzo