On Wed, Mar 10, 2021 at 7:03 PM Álvaro Fernández Rojas
[off-list ref] wrote:

quoted

El 10 mar 2021, a las 18:45, Rob Herring [off-list ref] escribió:

quoted

quoted

+      reg = <0x10000080 0x80>;
+
+      pinctrl: pinctrl {
+        compatible = "brcm,bcm6328-pinctrl";
+
+        gpio {
+          compatible = "brcm,bcm6328-gpio";

I'm still trying to understand why you need 3 levels of nodes here?
The gpio controller contains a pin controller plus other undefined
functions (because of 'syscon') and the pin controller contains a gpio
controller?

In previous versions the gpio controller was registered along with the pin controller, but @Linus requested me to register the gpio pin controller ranges through device tree by using gpio-ranges and I decided to use this approach, which was already used by other pin controllers.
However, there aren’t any pinctrl drivers using gpio-regmap, so this is kind of new…

I think the crucial point is that these hardwares (all patches in the series)
is very similar and some contain several GPIO blocks rather than just
one.

The structure needs to be seen as a common pattern. We are doing this
because it gives a common structure to all BCM SoCs in this
family, which is nice.

Yours,
Linus Walleij