[PATCH v3 2/5] dt-bindings: media: IMX8MQ VPU: document reset usage
From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Date: 2021-03-01 15:20:15
Also in:
linux-arm-kernel, linux-media, linux-rockchip, lkml
Subsystem:
hantro vpu codec driver, media input infrastructure (v4l/dvb), open firmware and flattened device tree bindings, the rest · Maintainers:
Nicolas Dufresne, Benjamin Gaignard, Philipp Zabel, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Document IMX8MQ VPU bindings to add the phandle to the reset driver. Provide an independent reset driver allow to the both VPUs to share their control/reset hardware block. The reset driver replace what was previously done be using the 'ctrl' registers inside the driver. This breaks the compatibility between DTB and kernel but the driver is still in staging directory and limited to IMX8MQ SoC. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> --- version 3: - Fix error in VPU example node .../devicetree/bindings/media/nxp,imx8mq-vpu.yaml | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
index 762be3f96ce9..fd53a4e43572 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml@@ -18,13 +18,12 @@ properties: const: nxp,imx8mq-vpu reg: - maxItems: 3 + maxItems: 2 reg-names: items: - const: g1 - const: g2 - - const: ctrl interrupts: maxItems: 2
@@ -46,6 +45,9 @@ properties: power-domains: maxItems: 1 + resets: + maxItems: 1 + required: - compatible - reg
@@ -54,6 +56,7 @@ required: - interrupt-names - clocks - clock-names + - resets additionalProperties: false
@@ -61,13 +64,13 @@ examples: - | #include <dt-bindings/clock/imx8mq-clock.h> #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/imx8mq-vpu-reset.h> vpu: video-codec@38300000 { compatible = "nxp,imx8mq-vpu"; reg = <0x38300000 0x10000>, - <0x38310000 0x10000>, - <0x38320000 0x10000>; - reg-names = "g1", "g2", "ctrl"; + <0x38310000 0x10000>; + reg-names = "g1", "g2"; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "g1", "g2";
@@ -76,4 +79,5 @@ examples: <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; clock-names = "g1", "g2", "bus"; power-domains = <&pgc_vpu>; + resets = <&vpu_reset IMX8MQ_RESET_VPU_RESET_G1>; };
--
2.25.1