On 2/23/2021 12:43 PM, Álvaro Fernández Rojas wrote:

This interrupt controller is present on bcm63xx SoCs in order to generate
interrupts based on GPIO status changes.

Signed-off-by: Álvaro Fernández Rojas <redacted>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---

[snip]

+static int __init bcm6345_ext_intc_of_init(struct device_node *node,
+					   struct device_node *parent)
+{
+	int num_irqs, ret = -EINVAL;
+	unsigned i;
+	void __iomem *base;
+	int irqs[MAX_IRQS] = { 0 };
+	u32 shift;
+	bool toggle_clear_on_ack = false;
+
+	num_irqs = of_irq_count(node);
+
+	if (!num_irqs || num_irqs > MAX_IRQS)
+		return -EINVAL;
+
+	if (of_property_read_u32(node, "brcm,field-width", &shift))
+		shift = 4;

This property is not documented in the binding, other than that:

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian