Thread (1 message) 1 message, 1 author, 2021-01-13

[PATCH 3/3] arm64: dts: reset: add microchip sparx5 switch reset driver

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From: Steen Hegelund <steen.hegelund@microchip.com>
Date: 2021-01-13 20:21:25
Also in: linux-arm-kernel, lkml
Subsystem: arm/microchip (arm64) soc support, arm/microchip sparx5 soc support, the rest · Maintainers: Conor Dooley, Nicolas Ferre, Claudiu Beznea, Steen Hegelund, Daniel Machon, Linus Torvalds

Status: Superseded by v9 (posted 2021-04-16). [go to v9]

Revision v1 (9 revisions archived).

Revisions (9)
  1. v1 current
  2. v2 [diff against previous]
  3. v3 [diff against previous]
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  8. v8 [diff against previous]
  9. v9 [diff against previous] 
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
---
 arch/arm64/boot/dts/microchip/sparx5.dtsi | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 380281f312d8..6f0a21c362e3 100644
--- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
@@ -132,9 +132,16 @@ mux: mux-controller {
 			};
 		};
 
-		reset@611010008 {
-			compatible = "microchip,sparx5-chip-reset";
-			reg = <0x6 0x11010008 0x4>;
+		gcb_ctrl: syscon@611010000 {
+			compatible = "microchip,sparx5-gcb-syscon", "syscon";
+			reg = <0x6 0x11010000 0x10000>;
+		};
+
+		reset: reset-controller@0 {
+			compatible = "microchip,sparx5-switch-reset";
+			reg = <0x6 0x0 0x0>;
+			#reset-cells = <1>;
+			syscons = <&cpu_ctrl>,<&gcb_ctrl>;
 		};
 
 		uart0: serial@600100000 {
-- 
2.29.2
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