Thread (23 messages) 23 messages, 6 authors, 2021-05-12

Re: [PATCH 1/3] dt-bindings: power: Introduce 'assigned-performance-states' property

From: Ulf Hansson <hidden>
Date: 2021-01-08 09:41:07
Also in: linux-arm-msm, linux-i2c, linux-pm, lkml

On Thu, 31 Dec 2020 at 16:49, Rob Herring [off-list ref] wrote:
On Thu, Dec 24, 2020 at 04:42:08PM +0530, Roja Rani Yarubandi wrote:
quoted
While most devices within power-domains which support performance states,
scale the performance state dynamically, some devices might want to
set a static/default performance state while the device is active.
These devices typically would also run off a fixed clock and not support
dynamically scaling the device's performance, also known as DVFS
techniques.

Add a property 'assigned-performance-states' which client devices can
use to set this default performance state on their power-domains.

Signed-off-by: Roja Rani Yarubandi <redacted>
---
 .../bindings/power/power-domain.yaml          | 49 +++++++++++++++++++
 1 file changed, 49 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/power-domain.yaml b/Documentation/devicetree/bindings/power/power-domain.yaml
index aed51e9dcb11..a42977a82d06 100644
--- a/Documentation/devicetree/bindings/power/power-domain.yaml
+++ b/Documentation/devicetree/bindings/power/power-domain.yaml
@@ -66,6 +66,18 @@ properties:
       by the given provider should be subdomains of the domain specified
       by this binding.

+  assigned-performance-states:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description:
+       Some devices might need to configure their power domains in a default
+       performance state while the device is active. These devices typcially
+       would also run off a fixed clock and not support dynamically scaling
+       the device's performance, also known as DVFS techniques. Each cell in
+       performance state value corresponds to one power domain specified as
+       part of the power-domains property. Performance state value can be an
+       opp-level inside an OPP table of the power-domain and need not match
+       with any OPP table performance state.
Couldn't this just be an additional cell in 'power-domains'?
Right. Some SoCs already use the cell to specify per device SoC
specific data [1].

Although, I am wondering if we shouldn't consider
"assigned-performance-states" as a more generic binding. I think it
would be somewhat comparable with the existing "assigned-clock-rates"
binding, don't you think?

[...]

Kind regards
Uffe

[1]
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
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