[RFC PATCH 12/12] [DO NOT MERGE] ARM: dts: sun8i: v831: add a device tree file for Y20GA
From: Icenowy Zheng <icenowy@aosc.io>
Date: 2020-12-12 05:16:12
Also in:
linux-arm-kernel, lkml
Subsystem:
arm and arm64 soc sub-architectures (common parts), the rest · Maintainers:
Arnd Bergmann, Krzysztof Kozlowski, Alexandre Belloni, Linus Walleij, Linus Torvalds
Yi Y20GA is an IP camera with QG2101A chip (a rebranded Allwinner V831). Add a device tree for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/sun8i-v831-yi-y20ga.dts | 53 +++++++++++++++++++++++ 2 files changed, 55 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/sun8i-v831-yi-y20ga.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ce66ffd5a1bb..2b2e93bb9ee2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile@@ -1212,7 +1212,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-t3-cqa3t-bv3.dtb \ sun8i-v3s-licheepi-zero.dtb \ sun8i-v3s-licheepi-zero-dock.dtb \ - sun8i-v40-bananapi-m2-berry.dtb + sun8i-v40-bananapi-m2-berry.dtb \ + sun8i-v831-yi-y20ga.dtb dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-optimus.dtb \ sun9i-a80-cubieboard4.dtb
diff --git a/arch/arm/boot/dts/sun8i-v831-yi-y20ga.dts b/arch/arm/boot/dts/sun8i-v831-yi-y20ga.dts
new file mode 100644
index 000000000000..16f4b6dbe0d2
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-v831-yi-y20ga.dts@@ -0,0 +1,53 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2020 Icenowy Zheng <icenowy@aosc.io> + */ + +/dts-v1/; +#include "sun8i-v831.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Yi Camera Y20GA"; + compatible = "xiaoyi,y20ga", "allwinner,sun8i-v831"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&mmc0 { + vmmc-supply = <®_vcc3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + bus-width = <4>; + status = "okay"; +}; + +&spi0 { + pinctrl-0 = <&spi0_qspi_pins>, <&spi0_cs_pin>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "winbond,w25q128", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <4000000>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph9_ph10_pins>; + status = "okay"; +};
--
2.28.0