[PATCH v3 3/6] spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
From: Ramuthevar,Vadivel MuruganX <hidden>
Date: 2020-10-26 09:46:09
Also in:
linux-spi, lkml
Subsystem:
spi subsystem, the rest · Maintainers:
Mark Brown, Linus Torvalds
From: Ramuthevar Vadivel Murugan <redacted> Add multiple chipselect support for Intel LGM SoCs, currently QSPI-NOR and QSPI-NAND supported. Signed-off-by: Ramuthevar Vadivel Murugan <redacted> --- drivers/spi/spi-cadence-quadspi.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 6d6f7c440ece..c4440797db43 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c@@ -38,6 +38,7 @@ /* Capabilities */ #define CQSPI_SUPPORTS_OCTAL BIT(0) +#define CQSPI_SUPPORTS_MULTI_CHIPSELECT BIT(1) struct cqspi_st;
@@ -75,6 +76,7 @@ struct cqspi_st { bool is_decoded_cs; u32 fifo_depth; u32 fifo_width; + u32 num_chipselect; bool rclk_en; u32 trigger_address; u32 wr_delay;
@@ -1049,6 +1051,7 @@ static int cqspi_of_get_flash_pdata(struct platform_device *pdev, static int cqspi_of_get_pdata(struct cqspi_st *cqspi) { + const struct cqspi_driver_platdata *ddata; struct device *dev = &cqspi->pdev->dev; struct device_node *np = dev->of_node;
@@ -1070,6 +1073,15 @@ static int cqspi_of_get_pdata(struct cqspi_st *cqspi) return -ENXIO; } + ddata = of_device_get_match_data(dev); + if (ddata->hwcaps_mask & CQSPI_SUPPORTS_MULTI_CHIPSELECT) { + if (of_property_read_u32(np, "num-chipselect", + &cqspi->num_chipselect)) { + dev_err(dev, "couldn't determine number of cs\n"); + return -ENXIO; + } + } + cqspi->rclk_en = of_property_read_bool(np, "cdns,rclk-en"); return 0;
@@ -1307,6 +1319,9 @@ static int cqspi_probe(struct platform_device *pdev) cqspi->current_cs = -1; cqspi->sclk = 0; + if (ddata->hwcaps_mask & CQSPI_SUPPORTS_MULTI_CHIPSELECT) + master->num_chipselect = cqspi->num_chipselect; + ret = cqspi_setup_flash(cqspi); if (ret) { dev_err(dev, "failed to setup flash parameters %d\n", ret);
@@ -1396,6 +1411,7 @@ static const struct cqspi_driver_platdata am654_ospi = { }; static const struct cqspi_driver_platdata intel_lgm_qspi = { + .hwcaps_mask = CQSPI_SUPPORTS_MULTI_CHIPSELECT, .quirks = CQSPI_DISABLE_DAC_MODE, };
--
2.11.0