On 2020/10/1 14:40, Krzysztof Kozlowski wrote:

On Wed, Sep 30, 2020 at 11:17:06AM +0800, Zhen Lei wrote:

quoted

Convert the Hisilicon CPU controller binding to DT schema format using
json-schema.

Signed-off-by: Zhen Lei <redacted>
---
 .../bindings/arm/hisilicon/controller/cpuctrl.yaml | 29 ++++++++++++++++++++++
 .../arm/hisilicon/controller/hisilicon,cpuctrl.txt |  8 ------
 2 files changed, 29 insertions(+), 8 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
 delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
new file mode 100644
index 000000000000000..f6a314db3a59416
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml

@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon CPU controller
+
+maintainers:
+  - Wei Xu <xuwei5@hisilicon.com>
+
+description: |
+  The clock registers and power registers of secondary cores are defined
+  in CPU controller, especially in HIX5HD2 SoC.
+
+properties:
+  compatible:
+    items:
+      - const: hisilicon,cpuctrl
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg

Your own DTS file (arch/arm/boot/dts/hisi-x5hd2.dtsi) does not validate
against this dtschema.

OK, I saw it. I just sent out a set of patches, to clean up all Hisilicon-related
errors detected by DT schema on arm32. Because many new YAML files are generated
this time, so I use the dtbs_check to check all the files at a times. The error
information did not contain the compatible string, So I didn't see it.

Best regards,
Krzysztof

.