Re: [PATCH v2 2/4] dt-bindings: i3c: Describe Silvaco master binding
From: Rob Herring <robh@kernel.org>
Date: 2020-08-24 23:24:43
Also in:
linux-i3c, lkml
On Wed, Aug 12, 2020 at 04:13:10PM +0200, Miquel Raynal wrote:
quoted hunk ↗ jump to hunk
Silvaco provide a dual-role I3C master. Description is rather simple: it needs a register mapping, three clocks and an interrupt. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- Changes in v2: * Updated Rob's tool and fixed the mistake reported. * Updated the vendor prefix. .../bindings/i3c/silvaco,i3c-master.yaml | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yamldiff --git a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml new file mode 100644 index 000000000000..63731e8a9068 --- /dev/null +++ b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml@@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silvaco I3C master + +maintainers: + - Conor Culhane <conor.culhane@silvaco.com> + +properties: + compatible: + const: silvaco,i3c-master + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clock-names: + description: | + There are three clocks: + pclk: System clock + fast_clk: Fast clock (for the bus) + slow_clk: Slow clock (for other events)
You basically say this in the schema... If you want some description, do
it in 'clocks':
clocks:
items:
- description: ...
- description: ...
- description: ...
+ + items: + - const: pclk + - const: fast_clk + - const: slow_clk + + clocks: + minItems: 3 + maxItems: 3 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clock-names + - clocks
additionalProperties: false And that will point out some errors in the example.
+
+examples:
+ - |
+ i3c-master@a0000000 {
+ compatible = "silvaco,i3c-master";
+ clocks = <&zynqmp_clk 71>, <&fclk>, <&sclk>;
+ clock-names = "pclk", "fast_clk", "slow_clk";
+ interrupt-parent = <&gic>;
+ interrupts = <0 89 4>;
+ reg = <0xa0000000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
--
2.20.1