RE: [PATCH v2 2/2] dt-bindings: pwm: keembay: Add bindings for Intel Keem Bay PWM

-----Original Message-----
From: Rob Herring <robh@kernel.org>
Sent: Friday, July 24, 2020 1:47 AM
To: G Jaya Kumaran, Vineetha <redacted>
Cc: thierry.reding@gmail.com; u.kleine-koenig@pengutronix.de; linux-
pwm@vger.kernel.org; devicetree@vger.kernel.org; Wan Mohamad, Wan
Ahmad Zainie [off-list ref]; Shevchenko,
Andriy [off-list ref]
Subject: Re: [PATCH v2 2/2] dt-bindings: pwm: keembay: Add bindings for
Intel Keem Bay PWM

On Sat, Jul 18, 2020 at 10:47:08PM +0800,
vineetha.g.jaya.kumaran@intel.com wrote:

quoted

From: "Vineetha G. Jaya Kumaran" <redacted>

Add PWM Device Tree bindings documentation for the Intel Keem Bay SoC.

Signed-off-by: Vineetha G. Jaya Kumaran
[off-list ref]
---
 .../devicetree/bindings/pwm/intel,keembay-pwm.yaml | 45
++++++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644
Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml

diff --git
a/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml
b/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml
new file mode 100644
index 00000000..e9388a7

--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/intel,keembay-

pwm.yaml

quoted

@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright
+(C) 2020 Intel Corporation %YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/intel,keembay-pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Keem Bay PWM Device Tree Bindings
+
+maintainers:
+  - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
+
+allOf:
+  - $ref: pwm.yaml#
+
+properties:
+  compatible:
+    enum:
+      - intel,keembay-pwm
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  "#pwm-cells":
+    const: 2
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - '#pwm-cells'

Add:

additionalProperties: false

With that,

Reviewed-by: Rob Herring <robh@kernel.org>

Thank you for reviewing, I will add this in V3.

quoted

+
+examples:
+  - |
+    #define KEEM_BAY_A53_GPIO
+
+    pwm@203200a0 {
+      compatible = "intel,keembay-pwm";
+      reg = <0x203200a0 0xe8>;
+      clocks = <&scmi_clk KEEM_BAY_A53_GPIO>;
+      #pwm-cells = <2>;
+    };
--
1.9.1