On 2020-07-10 22:19, Rob Clark wrote:

On Thu, Jun 25, 2020 at 5:46 AM Kalyan Thota [off-list ref] 
wrote:

quoted

Setup an RGB HW pipe as cursor which can be used on
secondary interface.

For SC7180 2 HW pipes are enumerated as cursors
1 - primary interface
2 - secondary interface

Signed-off-by: Kalyan Thota <redacted>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 

b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 8f2357d..23061fd 100644

--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

@@ -117,10 +117,10 @@
                .reg_off = 0x2AC, .bit_off = 0},
        .clk_ctrls[DPU_CLK_CTRL_DMA0] = {
                .reg_off = 0x2AC, .bit_off = 8},
-       .clk_ctrls[DPU_CLK_CTRL_DMA1] = {
-               .reg_off = 0x2B4, .bit_off = 8},
        .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = {
-               .reg_off = 0x2BC, .bit_off = 8},
+               .reg_off = 0x2B4, .bit_off = 8},
+       .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = {
+               .reg_off = 0x2C4, .bit_off = 8},

It looks like you shifted the register offset here from 0x2bc to
0x2c4, was that intentional?

BR,
-R

Yes Rob, the offset was wrong which i corrected in this patch.

quoted

        },
 };

@@ -272,10 +272,10 @@
                sc7180_vig_sblk_0, 0,  SSPP_TYPE_VIG, 

DPU_CLK_CTRL_VIG0),
        SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000,  DMA_SDM845_MASK,
                sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, 
DPU_CLK_CTRL_DMA0),
-       SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000,  DMA_SDM845_MASK,
-               sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, 
DPU_CLK_CTRL_DMA1),
+       SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000,  
DMA_CURSOR_SDM845_MASK,
+               sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, 
DPU_CLK_CTRL_CURSOR0),
        SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000,  
DMA_CURSOR_SDM845_MASK,
-               sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, 
DPU_CLK_CTRL_CURSOR0),
+               sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, 
DPU_CLK_CTRL_CURSOR1),
 };

 /*************************************************************
--
1.9.1

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