Thread (12 messages) 12 messages, 2 authors, 2020-06-25
STALE2226d

[PATCH 5/8] arm64: dts: qcom: sdm630: Fix the pinctrl node

From: Konrad Dybcio <hidden>
Date: 2020-06-23 18:08:56
Also in: linux-arm-msm, linux-pm, lkml
Subsystem: arm/qualcomm mailing list, arm/qualcomm support, the rest · Maintainers: Bjorn Andersson, Konrad Dybcio, Linus Torvalds

Previously present pinctrl node didn't show
problems, but I have in fact misconfigured it.

Fix it to actually enable the use of GPIOs.

Signed-off-by: Konrad Dybcio <redacted>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 92bf4ae6a590..25c18edcb1fa 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -582,14 +582,18 @@ tcsr_mutex_regs: syscon@1f40000 {
 			reg = <0x01f40000 0x20000>;
 		};
 
-		tlmm: pinctrl@3000000 {
+		tlmm: pinctrl@3100000 {
 			compatible = "qcom,sdm630-pinctrl";
-			reg = <0x03000000 0xc00000>;
+			reg = <0x03100000 0x400000>,
+				  <0x03500000 0x400000>,
+				  <0x03900000 0x400000>;
+			reg-names = "south", "center", "north";
 			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
 			gpio-controller;
-			#gpio-cells = <0x2>;
+			gpio-ranges = <&tlmm 0 0 114>;
+			#gpio-cells = <2>;
 			interrupt-controller;
-			#interrupt-cells = <0x2>;
+			#interrupt-cells = <2>;
 
 			blsp1_uart1_default: blsp1-uart1-default {
 				pins = "gpio0", "gpio1", "gpio2", "gpio3";
-- 
2.27.0
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