[PATCH 5/4] dt-bindings: display: bridge: thc63lvd1024: Document dual-output mode
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Date: 2020-05-13 23:21:39
Also in:
dri-devel, linux-renesas-soc
Subsystem:
drm drivers, drm drivers and misc gpu patches, drm drivers for bridge chips, open firmware and flattened device tree bindings, the rest · Maintainers:
David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Andrzej Hajda, Neil Armstrong, Robert Foss, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
The DT binding support both dual-input and dual-output mode, but only dual-input is documented. Document dual-output mode. Suggested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> --- .../display/bridge/thine,thc63lvd1024.yaml | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.yaml b/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.yaml
index 469ac4a34273..fedd3460d6f6 100644
--- a/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.yaml@@ -30,11 +30,17 @@ properties: This device has four video ports. Their connections are modeled using the OF graph bindings specified in Documentation/devicetree/bindings/graph.txt. - The device can operate in single-link mode or dual-link mode. In - single-link mode, all pixels are received on port@0, and port@1 shall not - contain any endpoint. In dual-link mode, even-numbered pixels are - received on port@0 and odd-numbered pixels on port@1, and both port@0 and - port@1 shall contain endpoints. + The device can operate in single or dual input and output modes. + + When operating in single input mode, all pixels are received on port@0, + and port@1 shall not contain any endpoint. In dual input mode, + even-numbered pixels are received on port@0 and odd-numbered pixels on + port@1, and both port@0 and port@1 shall contain endpoints. + + When operating in single output mode all pixels are output from the first + CMOS/TTL port and port@3 shall not contain any endpoint. In dual output + mode pixels are output from both CMOS/TTL ports and both port@2 and + port@3 shall contain endpoints. properties: '#address-cells':
--
Regards,
Laurent Pinchart