On Mon, 18 May 2020 14:46:14 +0100
Lorenzo Pieralisi [off-list ref] wrote:

On Mon, May 18, 2020 at 12:30:04PM +0200, Pali Rohár wrote:

quoted

On Sunday 17 May 2020 17:57:02 Gregory CLEMENT wrote:  

quoted

Hello,
  

quoted

Hello,

On Thu, 30 Apr 2020 10:06:13 +0200
Pali Rohár [off-list ref] wrote:
 

quoted

Marek Behún (5):
  PCI: aardvark: Improve link training
  PCI: aardvark: Add PHY support
  dt-bindings: PCI: aardvark: Describe new properties
  arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio function
  arm64: dts: marvell: armada-37xx: Move PCIe comphy handle property

Pali Rohár (7):
  PCI: aardvark: Train link immediately after enabling training
  PCI: aardvark: Don't blindly enable ASPM L0s and don't write to
    read-only register
  PCI: of: Zero max-link-speed value is invalid
  PCI: aardvark: Issue PERST via GPIO
  PCI: aardvark: Add FIXME comment for PCIE_CORE_CMD_STATUS_REG access
  PCI: aardvark: Replace custom macros by standard linux/pci_regs.h
    macros
  arm64: dts: marvell: armada-37xx: Move PCIe max-link-speed property  

Thanks a lot for this work. For a number of reasons, I'm less involved
in Marvell platform support in Linux, but I reviewed your series and
followed the discussions around it, and I'm happy to give my:

Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>  

With this acked-by for the series, the reviewed-by from Rob on the
binding and the tested-by, I am pretty confident so I applied the
patches 10, 11 and 12 on mvebu/dt64.

Thanks,

Gregory  

Thank you!

Lorenzo, would you now take remaining patches?  

Yes - even though I have reservations about patch (5) and the
problem is related to a complete lack of programming model for
these host controllers and a clear separation between what's
done in the OS vs bootloader, PERST handling in this host
bridge is *really* a mess.

I applied 1-9 to pci/aardvark.

Lorenzo

Hooray, thanks, Lorenzo (and everyone else).