On Wed, 25 Mar 2020 at 10:03, Stephen Boyd [off-list ref] wrote:

Quoting Chunyan Zhang (2020-03-22 04:00:39)

quoted

Hi Stephen,

On Sat, 21 Mar 2020 at 09:12, Stephen Boyd [off-list ref] wrote:

quoted

Quoting Chunyan Zhang (2020-03-03 23:27:26)

quoted

From: Chunyan Zhang <redacted>

add a new bindings to describe sc9863a clock compatible string.

Signed-off-by: Chunyan Zhang <redacted>

[...]

quoted

+examples:
+  - |
+    ap_clk: clock-controller@21500000 {
+      compatible = "sprd,sc9863a-ap-clk";
+      reg = <0 0x21500000 0 0x1000>;
+      clocks = <&ext_26m>, <&ext_32k>;
+      clock-names = "ext-26m", "ext-32k";
+      #clock-cells = <1>;
+    };
+
+  - |
+    soc {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      ap_ahb_regs: syscon@20e00000 {
+        compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd";
+        reg = <0 0x20e00000 0 0x4000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0 0x20e00000 0x4000>;
+
+        apahb_gate: apahb-gate@0 {

Why do we need a node per "clk type" in the simple-mfd syscon? Can't we
register clks from the driver that matches the parent node and have that
driver know what sorts of clks are where? Sorry I haven't read the rest
of the patch series and I'm not aware if this came up before. If so,
please put details about this in the commit text.

Please see the change logs after v2 in cover-letter.

Rob suggested us to put some clocks under syscon nodes, since these
clocks have the same
physical address base with the syscon;

Ok. I'll apply the series to clk-next then.

Thank you.

Chunyan