On Mon, Dec 02, 2019 at 01:48:27PM +0000, Chandan Uddaraju wrote:
quoted hunk
Add the needed DP PLL specific files to support
display port interface on msm targets.
The DP driver calls the DP PLL driver registration.
The DP driver sets the link and pixel clock sources.
Changes in v2:
-- Update copyright markings on all relevant files.
-- Use DRM_DEBUG_DP for debug msgs.
Signed-off-by: Chandan Uddaraju <redacted>
---
diff --git a/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c b/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
new file mode 100644
index 0000000..6ef2492
--- /dev/null
+++ b/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
...
+static u8 dp_mux_get_parent_10nm(struct clk_hw *hw)
+{
+ u32 auxclk_div = 0;
+ struct dp_pll_10nm_pclksel *pclksel = to_pll_10nm_pclksel(hw);
+ struct dp_pll_10nm *dp_res = pclksel->pll;
+ u8 val = 0;
+
+ DRM_ERROR("clk_hw->init->name = %s\n", hw->init->name);
drive-by comment: DRM_ERROR doesn't seem the right level, DRM_DEBUG_DP
would probably be more adequate.
Also I found this line triggers a NULL pointer dereference on a SC7180
system, where clk_hw->init is NULL.