R: [PATCH v8 2/2] dt-bindings: net: Add ipq806x mdio bindings
From: <ansuelsmth@gmail.com>
Date: 2020-02-27 22:02:00
Also in:
linux-arm-msm, lkml, netdev
On Thu, Feb 27, 2020 at 02:10:46AM +0100, Ansuel Smith wrote:quoted
Add documentations for ipq806x mdio driver. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> --- Changes in v8: - Fix error in dtb check - Remove not needed reset definition from example - Add include header for ipq806x clocks - Fix wrong License type Changes in v7: - Fix dt_binding_check problem .../bindings/net/qcom,ipq8064-mdio.yaml | 61+++++++++++++++++++quoted
1 file changed, 61 insertions(+) create mode 100644Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yamlquoted
diff --git a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq8064- mdio.yamlquoted
new file mode 100644 index 000000000000..4334a415f23c--- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yamlquoted
@@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-onlyDual license new bindings please: (GPL-2.0-only OR BSD-2-Clause)quoted
+%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm ipq806x MDIO bus controller + +maintainers: + - Ansuel Smith [off-list ref] + +description: + The ipq806x soc have a MDIO dedicated controller that is + used to comunicate with the gmac phy conntected.2 typosquoted
+ Child nodes of this MDIO bus controller node are standard + Ethernet PHY device nodes as described in + Documentation/devicetree/bindings/net/phy.txtYou might want to read what that file says now.quoted
+ +allOf: + - $ref: "mdio.yaml#" + +properties: + compatible: + items: + - const: qcom,ipq8064-mdio + - const: sysconWhy is this a 'syscon'? Does it have more than 1 function?
Since the code use syscon_node_to_regmap, the syscon compatible is need or the driver fails to load. (since the reg is used also for the gmac node) Again sorry for the mess as I misread the email... Will fix all in v9
quoted
+ + reg: + description: address and length of the register set for the deviceDrop this and you need to state how many (maxItems).quoted
+ + clocks: + description: A reference to the clock supplying the MDIO buscontroller Same here.quoted
+ + clock-names: + const: master + +required: + - compatible + - reg + - clocks + - "#address-cells" + - "#size-cells" + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq806x.h> + + mdio0: mdio@37000000 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + + clocks = <&gcc GMAC_CORE1_CLK>; + + switch@10 { + compatible = "qca,qca8337"; + /* ... */ + }; + }; -- 2.25.0