Re: [PATCH v2 2/2] dt-bindings: PCI: Convert PCIe Host/Endpoint in Cadence platform to DT schema
From: Rob Herring <robh@kernel.org>
Date: 2020-02-19 20:32:09
Also in:
linux-pci, lkml
On Mon, Feb 17, 2020 at 04:45:19PM +0530, Kishon Vijay Abraham I wrote:
Include Cadence core DT schema and define the Cadence platform DT schema for both Host and Endpoint mode. Note: The Cadence core DT schema could be included for other platforms using Cadence PCIe core. Signed-off-by: Kishon Vijay Abraham I <redacted> --- .../bindings/pci/cdns,cdns-pcie-ep.txt | 27 ------- .../bindings/pci/cdns,cdns-pcie-ep.yaml | 48 ++++++++++++ .../bindings/pci/cdns,cdns-pcie-host.txt | 66 ---------------- .../bindings/pci/cdns,cdns-pcie-host.yaml | 76 +++++++++++++++++++ MAINTAINERS | 2 +- 5 files changed, 125 insertions(+), 94 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml delete mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
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diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml new file mode 100644 index 000000000000..2f605297f862 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml@@ -0,0 +1,76 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-host.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence PCIe host controller + +maintainers: + - Tom Joseph <tjoseph@cadence.com> + +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + - $ref: "cdns-pcie-host.yaml#" + +properties: + compatible: + const: cdns,cdns-pcie-host + + reg: + maxItems: 3 + + reg-names: + items: + - const: reg + - const: cfg + - const: mem + + msi-parent: true + +required: + - reg + - reg-names + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + pcie@fb000000 { + compatible = "cdns,cdns-pcie-host"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0xff>; + linux,pci-domain = <0>; + cdns,max-outbound-regions = <16>; + cdns,no-bar-match-nbits = <32>;
+ vendor-id = /bits/ 16 <0x17cd>; + device-id = /bits/ 16 <0x0200>;
Please make these 32-bit as that is what the spec says.
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+ + reg = <0x0 0xfb000000 0x0 0x01000000>, + <0x0 0x41000000 0x0 0x00001000>, + <0x0 0x40000000 0x0 0x04000000>; + reg-names = "reg", "cfg", "mem"; + + ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>, + <0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>; + + #interrupt-cells = <0x1>; + + interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 14 0x1>, + <0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 15 0x1>, + <0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 16 0x1>, + <0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 17 0x1>; + + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + + msi-parent = <&its_pci>; + + phys = <&pcie_phy0>; + phy-names = "pcie-phy"; + }; + }; +...diff --git a/MAINTAINERS b/MAINTAINERS index 38fe2f3f7b6f..e0402e001edd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS@@ -12739,7 +12739,7 @@ PCI DRIVER FOR CADENCE PCIE IP M: Tom Joseph <tjoseph@cadence.com> L: linux-pci@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/pci/cdns,*.txt +F: Documentation/devicetree/bindings/pci/cdns,* F: drivers/pci/controller/pcie-cadence* PCI DRIVER FOR FREESCALE LAYERSCAPE-- 2.17.1