Re: [PATCH v3 04/19] dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings
From: Rob Herring <robh@kernel.org>
Date: 2020-01-27 18:37:11
Also in:
linux-arm-msm, linux-usb, lkml
On Wed, Jan 22, 2020 at 06:55:55PM +0000, Bryan O'Donoghue wrote:
From: Jorge Ramirez-Ortiz <redacted> Binding description for Qualcomm's Synopsys 1.0.0 SuperSpeed phy controller embedded in QCS404. Based on Sriharsha Allenki's [off-list ref] original definitions. [bod: converted to yaml format] Signed-off-by: Jorge Ramirez-Ortiz <redacted> Cc: Jorge Ramirez-Ortiz <redacted> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Bjorn Andersson <redacted> Cc: Jorge Ramirez-Ortiz <redacted> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- .../bindings/phy/intel,lgm-emmc-phy.yaml | 56 --------------
Working around errors? Should be fixed now, but not yet in linux-next.
.../devicetree/bindings/phy/qcom,usb-ss.yaml | 75 +++++++++++++++++++ 2 files changed, 75 insertions(+), 56 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml
quoted hunk ↗ jump to hunk
diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml new file mode 100644 index 000000000000..3325b2f2e6a8 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml@@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/qcom,usb-ss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY + +maintainers: + - Bryan O'Donoghue <bryan.odonoghue@linaro.org> + +description: | + Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY + +properties: + compatible: + enum: + - qcom,usb-ssphy
Should be SoC specific.
+ + reg: + maxItems: 1 + description: USB PHY base address and length of the register map.
Can drop this. Doesn't really add anything.
+ + "#phy-cells": + const: 0 + description: Should be 0. See phy/phy-bindings.txt for details.
'Should be 0' is already expressed by the schema. The remaining reference isn't needed.
+ + clocks: + maxItems: 3 + minItems: 3 + description: phandles for rpmcc clock, PHY AHB clock, SuperSpeed pipe clock.
Split the description into 3 entries of 'items'. With that, minItems/maxItems is implicit.
+ + clock-names: + items: + - const: ref + - const: phy
'ahb' seems like a better name.
+ - const: pipe + + vdd-supply: + maxItems: 1
Drop.
+ description: phandle to the regulator VDD supply node. + + vdda1p8-supply: + maxItems: 1
Drop.
+ description: phandle to the regulator 1.8V supply node. + + resets: + items: + - description: COM reset + - description: PHY reset line + + reset-names: + items: + - const: com + - const: phy
required and additionalProperties needed.
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-qcs404.h>
+ #include <dt-bindings/clock/qcom,rpmcc.h>
+ usb3_phy: usb3-phy@78000 {
+ compatible = "qcom,usb-ssphy";
+ reg = <0x78000 0x400>;
+ #phy-cells = <0>;
+ clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
+ <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
+ <&gcc GCC_USB3_PHY_PIPE_CLK>;
+ clock-names = "ref", "phy", "pipe";
+ resets = <&gcc GCC_USB3_PHY_BCR>,
+ <&gcc GCC_USB3PHY_PHY_BCR>;
+ reset-names = "com", "phy";
+ vdd-supply = <&vreg_l3_1p05>;
+ vdda1p8-supply = <&vreg_l5_1p8>;
+ };
+...
--
2.25.0