On Thu, 23 Jan 2020 at 13:27, Jarkko Sakkinen
[off-list ref] wrote:

On Tue, 2020-01-14 at 15:16 +0100, Ard Biesheuvel wrote:

quoted

When fitted, the SynQuacer platform exposes its SPI TPM via a MMIO
window that is backed by the SPI command sequencer in the SPI bus
controller. This arrangement has the limitation that only byte size
accesses are supported, and so we'll need to provide a separate set
of read and write accessors that take this into account.

What is SynQuacer platform?

It is an arm64 SoC manufactured by Socionext.

I'm also missing a resolution why tpm_tis.c is extended to handle both
and not add tpm_tis_something.c instead. It does not follow the pattern
we have in place (e.g. look up tpm_tis_spi.c).

We could easily do that instead, if preferred. It's just that it would
duplicate a bit of code.