On Wed, 18 Dec 2019 16:24:02 +0000
[off-list ref] wrote:
From: Eugen Hristev <redacted>
The differential channels require writing the channel offset register (COR).
Otherwise they do not work in differential mode.
The configuration of COR is missing in triggered mode.
Signed-off-by: Eugen Hristev <redacted>
I'm not totally sure whether this predates the changes here, but if it does
please pull it to the front of the set and give it a fixes tag.
Otherwise, look at merging it in with where-ever it was introduced.
Thanks,
Jonathan
quoted hunk ↗ jump to hunk
---
drivers/iio/adc/at91-sama5d2_adc.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
index a6b4dff..ccffa48 100644
--- a/drivers/iio/adc/at91-sama5d2_adc.c
+++ b/drivers/iio/adc/at91-sama5d2_adc.c
@@ -900,6 +900,7 @@ static int at91_adc_buffer_postenable(struct iio_dev *indio)
for_each_set_bit(bit, indio->active_scan_mask, indio->num_channels) {
struct iio_chan_spec const *chan = at91_adc_chan_get(indio, bit);
+ u32 cor;
if (!chan)
continue;@@ -908,6 +909,17 @@ static int at91_adc_buffer_postenable(struct iio_dev *indio)
chan->type == IIO_PRESSURE)
continue;
+ cor = at91_adc_readl(st, AT91_SAMA5D2_COR);
+
+ if (chan->differential)
+ cor |= (BIT(chan->channel) | BIT(chan->channel2)) <<
+ AT91_SAMA5D2_COR_DIFF_OFFSET;
+ else
+ cor &= ~(BIT(chan->channel) <<
+ AT91_SAMA5D2_COR_DIFF_OFFSET);
+
+ at91_adc_writel(st, AT91_SAMA5D2_COR, cor);
+
at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel));
if (use_irq) {
at91_adc_writel(st, AT91_SAMA5D2_IER,