Re: [PATCH v2 2/6] dt-bindings: PCI: Add bindings for brcmstb's PCIe device
From: Rob Herring <robh@kernel.org>
Date: 2019-11-18 21:23:16
Also in:
linux-arm-kernel, linux-pci, lkml
On Tue, Nov 12, 2019 at 04:59:21PM +0100, Nicolas Saenz Julienne wrote:
quoted hunk ↗ jump to hunk
From: Jim Quinlan <redacted> The DT bindings description of the brcmstb PCIe device is described. This node can only be used for now on the Raspberry Pi 4. Signed-off-by: Jim Quinlan <redacted> Co-developed-by: Nicolas Saenz Julienne <redacted> Signed-off-by: Nicolas Saenz Julienne <redacted> --- Changes since v1: - Fix commit Subject - Remove linux,pci-domain This was based on Jim's original submission[1], converted to yaml and adapted to the RPi4 case. [1] https://patchwork.kernel.org/patch/10605937/ .../bindings/pci/brcm,stb-pcie.yaml | 110 ++++++++++++++++++ 1 file changed, 110 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yamldiff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml new file mode 100644 index 000000000000..4cbb18821300 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml@@ -0,0 +1,110 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Brcmstb PCIe Host Controller Device Tree Bindings + +maintainers: + - Nicolas Saenz Julienne <nsaenzjulienne@suse.de> +
I added a common PCI schema to dt-schema. You can reference it here: allOf: - $ref: /schemas/pci/pci-bus.yaml#
+properties: + compatible: + const: brcm,bcm2711-pcie # The Raspberry Pi 4 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + items: + - description: PCIe host controller + - description: builtin MSI controller + + interrupt-names: + minItems: 1 + maxItems: 2 + items: + - const: pcie + - const: msi +
+ "#address-cells": + const: 3 + + "#size-cells": + const: 2 + + "#interrupt-cells": + const: 1 + + interrupt-map-mask: true + + interrupt-map: true
Drop all these as the pci-bus.yaml will cover them.
+ + ranges: true
Do you know many entries, if not, you can drop it too?
+ + dma-ranges: true
Do you know many entries, if not, you can drop it too?
+ + clocks: + maxItems: 1 + + clock-names: + items: + - const: sw_pcie + + msi-controller: + description: Identifies the node as an MSI controller. + type: boolean + + msi-parent: + description: MSI controller the device is capable of using. + $ref: /schemas/types.yaml#/definitions/phandle
Assume these 2 have a type defined.
+ + brcm,enable-ssc: + description: Indicates usage of spread-spectrum clocking. + type: boolean + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - "#interrupt-cells" + - interrupt-map-mask + - interrupt-map + - ranges + - dma-ranges
You can drop ranges, #address-cells and #size-cells as they are required in pci-bus.yaml. Shouldn't interrupts, interrupt-names, and msi-controller all be required?
+ +additionalProperties: false
This won't work having the commmon binding, but 'unevaluatedProperties: false' will (eventually when json-schema draft8 is supported).
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ scb {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ pcie0: pcie@7d500000 {
+ compatible = "brcm,bcm2711-pcie";
+ reg = <0x0 0x7d500000 0x9310>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pcie", "msi";
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;Bracket each entry. The schema is making this stricter. Rob