[PATCH 3/6] clk: meson: meson8b: use of_clk_hw_register to register the clocks

[PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b · Martin Blumenstingl <martin.blumenstingl@googlemail.com> · 2019-09-21
[PATCH 1/6] dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding · Martin Blumenstingl <martin.blumenstingl@googlemail.com> · 2019-09-21
Re: [PATCH 1/6] dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding · Rob Herring <robh@kernel.org> · 2019-10-02
[PATCH 2/6] clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller · Martin Blumenstingl <martin.blumenstingl@googlemail.com> · 2019-09-21
Re: [PATCH 2/6] clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller · Jerome Brunet <jbrunet@baylibre.com> · 2019-10-01
Re: [PATCH 2/6] clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller · Martin Blumenstingl <martin.blumenstingl@googlemail.com> · 2019-10-01
Re: [PATCH 2/6] clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller · Jerome Brunet <jbrunet@baylibre.com> · 2019-10-02
[PATCH 3/6] clk: meson: meson8b: use of_clk_hw_register to register the clocks · Martin Blumenstingl <martin.blumenstingl@googlemail.com> · 2019-09-21
[PATCH 4/6] clk: meson: meson8b: add the ddr_pll input for the audio clocks · Martin Blumenstingl <martin.blumenstingl@googlemail.com> · 2019-09-21
[PATCH 6/6] ARM: dts: meson8b: add the DDR clock controller · Martin Blumenstingl <martin.blumenstingl@googlemail.com> · 2019-09-21
[PATCH 5/6] ARM: dts: meson8: add the DDR clock controller · Martin Blumenstingl <martin.blumenstingl@googlemail.com> · 2019-09-21
Re: [PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b · Jerome Brunet <jbrunet@baylibre.com> · 2019-09-23
Re: [PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b · Martin Blumenstingl <martin.blumenstingl@googlemail.com> · 2019-09-23
Re: [PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b · Jerome Brunet <jbrunet@baylibre.com> · 2019-10-01

STALE2459d

Revisions (2)

2019-09-21 v1 current
2019-10-27 v2 [diff vs current]

From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: 2019-09-21 15:18:57
Also in: linux-amlogic, linux-arm-kernel, linux-clk, lkml
Subsystem: arm/amlogic meson soc clock framework, common clk framework, the rest · Maintainers: Neil Armstrong, Jerome Brunet, Michael Turquette, Stephen Boyd, Linus Torvalds

Switch from clk_hw_register to of_clk_hw_register so we can use
clk_parent_data.fw_name. This will be used to get the "xtal", "ddr_pll"
and possibly others from the .dtb.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/clk/meson/meson8b.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 15ec14fde2a0..fefb4b7185d0 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c

@@ -3696,7 +3696,7 @@ static void __init meson8b_clkc_init_common(struct device_node *np,
 		if (!clk_hw_onecell_data->hws[i])
 			continue;
 
-		ret = clk_hw_register(NULL, clk_hw_onecell_data->hws[i]);
+		ret = of_clk_hw_register(np, clk_hw_onecell_data->hws[i]);
 		if (ret)
 			return;
 	}

-- 
2.23.0

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