Xiaowei,

-----Original Message-----
From: Xiaowei Bao <redacted>
Sent: 2019年9月2日 11:17
To: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org;
Leo Li [off-list ref]; kishon@ti.com; lorenzo.pieralisi@arm.com;
M.h. Lian [off-list ref]; Mingkai Hu [off-list ref];
Roy Zang [off-list ref]; jingoohan1@gmail.com;
gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org;
devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org
Cc: arnd@arndb.de; gregkh@linuxfoundation.org; Z.q. Hou
[off-list ref]; Xiaowei Bao [off-list ref]
Subject: [PATCH v3 00/11] *** SUBJECT HERE ***

*** BLURB HERE ***

Add subject and blurb for this series.

Thanks,
Zhiqiang

Xiaowei Bao (11):
  PCI: designware-ep: Add multiple PFs support for DWC
  PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode
  PCI: designware-ep: Move the function of getting MSI capability
    forward
  PCI: designware-ep: Modify MSI and MSIX CAP way of finding
  dt-bindings: pci: layerscape-pci: add compatible strings for ls1088a
    and ls2088a
  PCI: layerscape: Fix some format issue of the code
  PCI: layerscape: Modify the way of getting capability with different
    PEX
  PCI: layerscape: Modify the MSIX to the doorbell mode
  PCI: layerscape: Add EP mode support for ls1088a and ls2088a
  arm64: dts: layerscape: Add PCIe EP node for ls1088a
  misc: pci_endpoint_test: Add LS1088a in pci_device_id table

 .../devicetree/bindings/pci/layerscape-pci.txt     |   4 +-
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi     |  31 +++
 drivers/misc/pci_endpoint_test.c                   |   1 +
 drivers/pci/controller/dwc/pci-layerscape-ep.c     | 100 ++++++--
 drivers/pci/controller/dwc/pcie-designware-ep.c    | 255
+++++++++++++++++----
 drivers/pci/controller/dwc/pcie-designware.c       |  59 +++--
 drivers/pci/controller/dwc/pcie-designware.h       |  48 +++-
 7 files changed, 404 insertions(+), 94 deletions(-)

--
2.9.5

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