[PATCH 4/6] ARM: dts: Configure sgx for omap5
From: Tony Lindgren <tony@atomide.com>
Date: 2019-08-14 13:14:28
Also in:
linux-clk
Subsystem:
the rest · Maintainer:
Linus Torvalds
I've tested that the interconnect target module enables and idles just fine when probed with ti-sysc with PM runtime control via sys: # echo on > $(find /sys -name control | grep \/5600) # rwmem 0x5600fe00 # OCP Revision 0x5600fe00 = 0x40000000 # echo auto > $(find /sys -name control | grep \/5600) # rwmem 0x5600fe10 # rwmem 0x56000024 Cc: Adam Ford <redacted> Cc: Filip Matijević <redacted> Cc: "H. Nikolaus Schaller" <redacted> Cc: Ivaylo Dimitrov <redacted> Cc: moaz korena <redacted> Cc: Merlijn Wajer <redacted> Cc: Paweł Chmiel <redacted> Cc: Philipp Rossak <redacted> Cc: Tomi Valkeinen <redacted> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/boot/dts/omap5.dtsi | 23 +++++++++++++++++++++++ arch/arm/boot/dts/omap54xx-clocks.dtsi | 14 ++++++++++++++ 2 files changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi@@ -257,6 +257,29 @@ ports-implemented = <0x1>; }; + target-module@56000000 { + compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0x5600fe00 0x4>, + <0x5600fe10 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-midle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>; + clocks = <&gpu_clkctrl OMAP5_GPU_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x56000000 0x2000000>; + + /* + * Closed source PowerVR driver, no child device + * binding or driver in mainline + */ + }; + dss: dss@58000000 { compatible = "ti,omap5-dss"; reg = <0x58000000 0x80>;
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi@@ -1146,6 +1146,20 @@ }; }; + gpu_cm: gpu_cm@1500 { + compatible = "ti,omap4-cm"; + reg = <0x1500 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1500 0x100>; + + gpu_clkctrl: clk@20 { + compatible = "ti,clkctrl"; + reg = <0x20 0x4>; + #clock-cells = <2>; + }; + }; + l3init_cm: l3init_cm@1600 { compatible = "ti,omap4-cm"; reg = <0x1600 0x100>;
--
2.21.0