Re: [PATCH v4 4/8] clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks

于 2019年7月20日 GMT+08:00 下午5:44:49, Maxime Ripard [off-list ref] 写到:

On Sat, Jul 13, 2019 at 11:46:30AM +0800, Icenowy Zheng wrote:

quoted

The MMC2 clock slices are currently not defined in V3s CCU driver,

which

quoted

makes MMC2 not working.

Fix this issue.

Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
New patch in v4.

 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

quoted

index 4eb68243e310..9c88015d4419 100644

--- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

@@ -513,6 +513,9 @@ static struct clk_hw_onecell_data

sun8i_v3s_hw_clks = {

quoted

 		[CLK_MMC1]		= &mmc1_clk.common.hw,
 		[CLK_MMC1_SAMPLE]	= &mmc1_sample_clk.common.hw,
 		[CLK_MMC1_OUTPUT]	= &mmc1_output_clk.common.hw,
+		[CLK_MMC2]		= &mmc1_clk.common.hw,
+		[CLK_MMC2_SAMPLE]	= &mmc1_sample_clk.common.hw,
+		[CLK_MMC2_OUTPUT]	= &mmc1_output_clk.common.hw,

You're using the same structures than mmc1, I guess it's a copy and
paste mistake?

Yes.

Maxime

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Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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