On Thu, 2019-02-07 at 16:08 +0100, Matthias Brugger wrote:

On 01/02/2019 06:11, Erin Lo wrote:

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Add back more people since mail server issue

On Fri, 2019-02-01 at 11:33 +0800, Erin Lo wrote:

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On Thu, 2019-01-31 at 15:10 -0600, Rob Herring wrote:

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On Wed, Jan 30, 2019 at 8:34 PM Erin Lo [off-list ref] wrote:

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On Wed, 2019-01-30 at 10:22 -0600, Rob Herring wrote:

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On Thu, Jan 24, 2019 at 04:07:20PM +0800, Erin Lo wrote:

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From: Ben Ho <redacted>

Add basic chip support for Mediatek 8183, include
pinctrl file, uart node with correct uart clocks, pwrap device

Add clock controller nodes, include topckgen, infracfg,
apmixedsys and subsystem.

Signed-off-by: Ben Ho <redacted>
Signed-off-by: Erin Lo <redacted>
Signed-off-by: Seiya Wang <redacted>
Signed-off-by: Zhiyong Tao <redacted>
Signed-off-by: Weiyi Lu <redacted>
Signed-off-by: Mengqi Zhang <redacted>
Signed-off-by: Hsin-Hsiung Wang <redacted>
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
---

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+   sysirq: intpol-controller@c530a80 {

interrupt-controller@...

I will modify it in next version.

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Place all the MMIO peripherals under one or more simple-bus nodes.

Rob

Do you mean need to add simple-bus like this?

Yes.

We remove soc because Matthias suggested it in former MTK SoC maybe in
2015 year.

We will add it back by your comment.

Thank you. 

Best Regards,
Erin

Hi, Matthias,
Do you have any comment here?

Although I wasn't able to find it in the documentation my understanding is, that
all devices on-chip should be under soc "bus".

I'm sorry if I created confusion with comments in the past.

Regards,
Matthias

OK! we will add soc "bus" back in next version.
Thank you for your comment.

Best Regards,
Erin

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Thanks

Best Regards,
Erin

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+   soc: soc {
+                #address-cells = <0x1>;
+                #size-cells = <0x1>;
+                ranges = <0 0 0 0xffffffff>;
+                compatible = "simple-bus";

                soc_data: soc_data@08000000 {
                        compatible = "mediatek,mt8183-efuse",
                                     "mediatek,efuse";
                        reg = <0 0x08000000 0 0x0010>;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        status = "disabled";
                };

                gic: interrupt-controller@0c000000 {
                        compatible = "arm,gic-v3";
                        #interrupt-cells = <4>;

Best Regards,
Erin

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