[PATCH v2 2/2] dt-bindings: interrupt-controller: loongson ls1x intc
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: 2019-01-23 06:30:38
Also in:
linux-mips, lkml
Subsystem:
irqchip drivers, open firmware and flattened device tree bindings, the rest · Maintainers:
Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Dt-bindings doc about Loongson-1 interrupt controller Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- .../loongson,ls1x-intc.txt | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt
diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt
new file mode 100644
index 000000000000..afa8fec45f88
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt@@ -0,0 +1,28 @@ +Loongson ls1x Interrupt Controller + +Required properties: + +- compatible : should be "ingenic,<socname>-intc". Valid strings are: + loongson,ls1b-intc + loongson,ls1c-intc + +- reg : Specifies base physical address and size of the registers. +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The value shall be 1. +- interrupts : Specifies the CPU interrupts the controller is connected to, + - For ls1b, it must have 4 interrupts. + - For ls1c, it must have 5 interrupts. + +Example: + +intc: interrupt-controller@1fd01040 { + compatible = "loongson,ls1c-intc"; + reg = <0x1fd01040 0x78>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpu_intc>; + interrupts = <2>, <3>, <4>, <5>, <6>; +};
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