[PATCH v3 3/7] dt-bindings: clock: qcom: Add QCOM WCSS GCC clock bindings
From: Govind Singh <hidden>
Date: 2018-12-15 10:36:20
Also in:
linux-clk, linux-remoteproc
Subsystem:
arm/qualcomm mailing list, common clk framework, open firmware and flattened device tree bindings, qualcomm clock drivers, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Linus Torvalds
Add device tree bindings for WiFi QDSP gcc clock controls found in QCS404 soc. Signed-off-by: Govind Singh <redacted> Reviewed-by: Rob Herring <robh@kernel.org> --- include/dt-bindings/clock/qcom,gcc-qcs404.h | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/include/dt-bindings/clock/qcom,gcc-qcs404.h b/include/dt-bindings/clock/qcom,gcc-qcs404.h
index 00ab0d77b38a..8f800adda225 100644
--- a/include/dt-bindings/clock/qcom,gcc-qcs404.h
+++ b/include/dt-bindings/clock/qcom,gcc-qcs404.h@@ -146,6 +146,8 @@ #define GCC_MDP_TBU_CLK 138 #define GCC_QDSS_DAP_CLK 139 #define GCC_DCC_XO_CLK 140 +#define GCC_WCSS_Q6_AHB_CBCR_CLK 141 +#define GCC_WCSS_Q6_AXIM_CBCR_CLK 142 #define GCC_GENI_IR_BCR 0 #define GCC_USB_HS_BCR 1
@@ -168,5 +170,6 @@ #define GCC_PCIE_0_CORE_STICKY_ARES 18 #define GCC_PCIE_0_SLEEP_ARES 19 #define GCC_PCIE_0_PIPE_ARES 20 +#define GCC_WDSP_RESTART 21 #endif
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