Thread (51 messages) 51 messages, 7 authors, 2019-01-25

Re: [PATCH v1 01/12] dt-bindings: usb: add support for dwc3 controller on HiSilicon SoCs

From: Chen Yu <chenyu56@huawei.com>
Date: 2018-12-03 08:51:21
Also in: linux-usb, lkml

Hi,

On 2018/12/3 16:35, Sergei Shtylyov wrote:
Hello!

On 03.12.2018 6:45, Yu Chen wrote:
quoted
This patch adds binding descriptions to support the dwc3 controller
on HiSilicon SoCs and boards like the HiKey960.

Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: John Stultz <redacted>
Signed-off-by: Yu Chen <chenyu56@huawei.com>
---
  .../devicetree/bindings/usb/dwc3-hisi.txt          | 67 ++++++++++++++++++++++
  1 file changed, 67 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/usb/dwc3-hisi.txt
diff --git a/Documentation/devicetree/bindings/usb/dwc3-hisi.txt b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt
new file mode 100644
index 000000000000..d32d2299a0a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt
@@ -0,0 +1,67 @@
+HiSilicon DWC3 USB SoC controller
+
+This file documents the parameters for the dwc3-hisi driver.
+
+Required properties:
+- compatible:    should be "hisilicon,hi3660-dwc3"
+- clocks:    A list of phandle + clock-specifier pairs for the
+        clocks listed in clock-names
+- clock-names:    Specify clock names
+- resets:    list of phandle and reset specifier pairs.
+
+Sub-nodes:
+The dwc3 core should be added as subnode to HiSilicon DWC3 as shown in the
+example below. The DT binding details of dwc3 can be found in:
+Documentation/devicetree/bindings/usb/dwc3.txt
+
+Example:
+    usb3: hisi_dwc3 {
+        compatible = "hisilicon,hi3660-dwc3";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        ranges;
+
+        clocks = <&crg_ctrl HI3660_CLK_ABB_USB>,
+             <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>;
+        clock-names = "clk_usb3phy_ref", "aclk_usb3otg";
+        assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>;
+        assigned-clock-rates = <229000000>;
+        resets = <&crg_rst 0x90 8>,
+             <&crg_rst 0x90 7>,
+             <&crg_rst 0x90 6>,
+             <&crg_rst 0x90 5>;
+
+        dwc3: dwc3@ff100000 {
    According to the DT spec, the node names should be generic, not chip specific, i.e. usb@ff100000 in this case.
Do you mean it should be usb@ff100000: dwc3@ff100000 ?

Thanks!
[...]

MBR, Sergei

.
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