Thread (34 messages) read the whole thread 34 messages, 3 authors, 2018-09-21

Re: [PATCH 18/21] arm64: dts: ls104xa: set mask to drop TBU ID from StreamID

From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Date: 2018-09-19 14:07:00
Also in: linux-arm-kernel, lkml, netdev

Hi Robin,

On 19.09.2018 16:41, Robin Murphy wrote:
On 19/09/18 13:36, laurentiu.tudor@nxp.com wrote:
quoted
From: Laurentiu Tudor <laurentiu.tudor@nxp.com>

The StreamID entering the SMMU is actually a concatenation of the
SMMU TBU ID and the ICID configured in software.
Since the TBU ID is internal to the SoC and since we want that the
actual the ICID configured in software to enter the SMMU witout any
additional set bits, mask out the TBU ID bits and leave only the
relevant ICID bits to enter SMMU.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
  arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 +
  arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
  2 files changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 8b3eba167508..90296b9fb171 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -226,6 +226,7 @@
              compatible = "arm,mmu-500";
              reg = <0 0x9000000 0 0x400000>;
              dma-coherent;
+            stream-match-mask = <0x7f00>;
The TBU ID only forms the top 5 bits, so also ignoring bits 9:8 raises 
an eyebrow - if the LS104x SMMU really is configured for 8-bit SID input 
then it's harmless, 
On these lower-end platforms the SID input is configured and documented 
as 8-bit.
but if it's actually a 9 or 10-bit configuration 
then you probably want to avoid masking them (or at least document why) 
- IIRC there *was* stuff wired there on LS2085 at least.
Yes, on LS2s there are 2 extra-bits in there carrying some signaling. 
However, on LS1s they are not present.

---
Thanks & Best Regards, Laurentiu
quoted
              #global-interrupts = <2>;
              #iommu-cells = <1>;
              interrupts = <0 142 4>, /* global secure fault */
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 06863d3e4a7d..15094dd8400e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -232,6 +232,7 @@
              compatible = "arm,mmu-500";
              reg = <0 0x9000000 0 0x400000>;
              dma-coherent;
+            stream-match-mask = <0x7f00>;
              #global-interrupts = <2>;
              #iommu-cells = <1>;
              interrupts = <0 142 4>, /* global secure fault */
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