Re: [PATCH v4 09/13] ARM: dts: sun8i: r40: add sata node

在 2018-08-31五的 19:10 +0800，Chen-Yu Tsai写道：

On Fri, Aug 31, 2018 at 5:29 PM Corentin Labbe
[off-list ref] wrote:

quoted

On Fri, Aug 31, 2018 at 03:58:34PM +0800, Chen-Yu Tsai wrote:

quoted

On Fri, Aug 31, 2018 at 3:56 PM Corentin Labbe
[off-list ref] wrote:

quoted

On Fri, Aug 31, 2018 at 09:35:00AM +0200, Maxime Ripard wrote:

quoted

On Thu, Aug 30, 2018 at 09:01:16PM +0200, Corentin Labbe
wrote:

quoted

R40 have a sata controller which is the same as A20.
This patch adds a DT node for it.

Signed-off-by: Icenowy Zheng <redacted>
Signed-off-by: Corentin Labbe <redacted>
---
 arch/arm/boot/dts/sun8i-r40.dtsi | 23
+++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi

b/arch/arm/boot/dts/sun8i-r40.dtsi
index 852c2ccc3268..d6b5820da850 100644

--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi

@@ -550,6 +550,29 @@
                    #size-cells = <0>;
            };

+           ahci: sata@1c18000 {
+                   compatible = "allwinner,sun8i-r40-

ahci";
+                   reg = <0x01c18000 0x1000>;
+                   interrupts = <GIC_SPI 56
IRQ_TYPE_LEVEL_HIGH>;
+                   clocks = <&ccu CLK_BUS_SATA>, <&ccu
CLK_SATA>;
+                   resets = <&ccu RST_BUS_SATA>;
+                   resets-name = "ahci";
+                   #address-cells = <1>;
+                   #size-cells = <0>;
+                   status = "disabled";
+
+                   sata_port: sata-port@0 {
+                           reg = <0>;
+                           phys = <&sata_phy>;
+                   };
+           };
+
+           sata_phy: sata-phy@1c180c0  {
+                   compatible = "allwinner,sun8i-r40-sata-
phy";
+                   reg = <0x1c180c0 0x200>;

Overlapping devices in the DTS is not ok.

I do the same than arch/arm/boot/dts/berlin2.dtsi (sata@e90000 
phy@e900a0)
But since it is not a good justification, it seems that regmap
is my only solution ?

Since you are effectively splitting one device node into two, you
should
adjust the original (ahci) device nodes register range.

I cannot do that if I remove patch 13, iow If I keep phy init code
in both place as you requested.

Then you need to split the phy handling between a10 and r40. A10
doesn't
need phy-supply at the moment anyway. And migrating A10 to newer
binding
is only causing you problems anyway. Just drop that part, and handle
the
R40.

From the hardware perspective, they're the same. The A10/A20 has also

two dedicated VDD pins for SATA, although on boards they're usually
always on.

ChenYu

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