RE: [v7 4/7] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings
From: Wen He <hidden>
Date: 2018-07-26 05:43:36
Also in:
dmaengine
-----Original Message----- From: Li Yang [mailto:leoyang.li@nxp.com] Sent: 2018年7月26日 5:19 To: Wen He <redacted> Cc: Vinod <vkoul@kernel.org>; dmaengine@vger.kernel.org; Rob Herring [off-list ref]; open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS [off-list ref]; Jiafei Pan [off-list ref]; Jiaheng Fan [off-list ref] Subject: Re: [v7 4/7] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings On Wed, Jul 25, 2018 at 6:29 AM, Wen He [off-list ref] wrote:quoted
Document the devicetree bindings for NXP Layerscape qDMA controller which could be found on NXP QorIQ Layerscape SoCs. Signed-off-by: Wen He <redacted> Reviewed-by: Rob Herring <robh@kernel.org> --- Documentation/devicetree/bindings/dma/fsl-qdma.txt | 41++++++++++++++++++++quoted
1 files changed, 41 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/dma/fsl-qdma.txtdiff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txtb/Documentation/devicetree/bindings/dma/fsl-qdma.txt new file mode 100644 index 0000000..99b3d74--- /dev/null +++ b/Documentation/devicetree/bindings/dma/fsl-qdma.txt@@ -0,0 +1,41 @@ +NXP Layerscape SoC qDMA Controller +================================== + +This device follows the generic DMA bindings defined in dma/dma.txt. + +Required properties: + +- compatible: Must be one of + "fsl,ls1021a-qdma": for LS1021A Board + "fsl,ls1043a-qdma": for ls1043A Board + "fsl,ls1046a-qdma": for ls1046A BoardCan you align on the case of "ls"?
OK
quoted
+- reg: Should contain the register's base address andlength.quoted
+- interrupts: Should contain a reference to the interrupt usedby thisquoted
+ device. +- interrupt-names: Should contain interrupt names: + "qdma-error": the error interrupt + "qdma-queue": the queue interrupt +- fsl,queues: Should contain number of queues supported.This property name looks very general. Not sure if making it a little bit more specific will be better such as "fsl,dma-queues".
Good idea, thank your comments.
quoted
+ +Optional properties: + +- dma-channels: Number of DMA channels supportedby the controller.quoted
+- big-endian: If present registers and hardware scatter/gatherdescriptorsquoted
+ of the qDMA are implemented in big endianmode, otherwise in littlequoted
+ mode. + +Examples: + + qdma: dma-controller@8390000 { + compatible = "fsl,ls1021a-qdma"; + reg = <0x0 0x8398000 0x0 0x2000 /* Controllerregisters */quoted
+ 0x0 0x839a000 0x0 0x2000>; /* Block registers*/quoted
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 76IRQ_TYPE_LEVEL_HIGH>;quoted
+ interrupt-names = "qdma-error", "qdma-queue"; + dma-channels = <8>; + queues = <2>;Not updated after the binding is updated.
What does means? Which one updated after the binding is update? Best Regards, Wen
quoted
+ big-endian; + }; + +DMA clients must use the format described in dma/dma.txt file. -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info athttps://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fvgerquoted
.kernel.org%2Fmajordomo-info.html&data=02%7C01%7Cwen.he_1%40nxp.coquoted
m%7Cf5c931a910a5410268fc08d5f2743fb2%7C686ea1d3bc2b4c6fa92cd99c 5c30163quoted
5%7C0%7C0%7C636681503456939918&sdata=zC57%2Bc9Ji2rjQY0KtNS d8mlKgppquoted
Jg2GqTeclwFy9Xjs%3D&reserved=0