[PATCH 0/3] Add MCAN Support for dra76x

The following patches add dts and hwmod support for MCAN in TI's
dra76 SOCs.

The patches depend on the following series:
https://patchwork.kernel.org/patch/10221105/

Tested on linux-next

Franklin S Cooper Jr (1):
  ARM: dts: dra76x: Add MCAN node

Lokesh Vutla (2):
  ARM: dra762: hwmod: Add MCAN support
  ARM: dts: dra762: Add MCAN clock support

 arch/arm/boot/dts/dra76-evm.dts           |  7 +++++
 arch/arm/boot/dts/dra76x.dtsi             | 50 +++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 32 ++++++++++++++++++++
 3 files changed, 89 insertions(+)

-- 
2.7.4

From: Lokesh Vutla <redacted>

Add MCAN hwmod data and register it for dra762 silicons.

Signed-off-by: Lokesh Vutla <redacted>
Signed-off-by: Faiz Abbas <redacted>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 62352d1..a2cd7f8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c

@@ -1356,6 +1356,29 @@ static struct omap_hwmod dra7xx_mailbox13_hwmod = {
 };
 
 /*
+ * 'mcan' class
+ *
+ */
+static struct omap_hwmod_class dra76x_mcan_hwmod_class = {
+	.name	= "mcan",
+};
+
+/* mcan */
+static struct omap_hwmod dra76x_mcan_hwmod = {
+	.name		= "mcan",
+	.class		= &dra76x_mcan_hwmod_class,
+	.clkdm_name	= "wkupaon_clkdm",
+	.main_clk	= "mcan_clk",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_WKUPAON_ADC_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_WKUPAON_ADC_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_SWCTRL,
+		},
+	},
+};
+
+/*
  * 'mcspi' class
  *
  */

@@ -3818,6 +3841,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per2__epwmss2 = {
 	.user		= OCP_USER_MPU,
 };
 
+/* l3_main_1 -> mcan */
+static struct omap_hwmod_ocp_if dra76x_l3_main_1__mcan = {
+	.master		= &dra7xx_l3_main_1_hwmod,
+	.slave		= &dra76x_mcan_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l3_main_1__dmm,
 	&dra7xx_l3_main_2__l3_instr,

@@ -3958,6 +3989,7 @@ static struct omap_hwmod_ocp_if *dra7xx_gp_hwmod_ocp_ifs[] __initdata = {
 /* SoC variant specific hwmod links */
 static struct omap_hwmod_ocp_if *dra76x_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l4_per3__usb_otg_ss4,
+	&dra76x_l3_main_1__mcan,
 	NULL,
 };
 

-- 
2.7.4

From: Lokesh Vutla <redacted>

MCAN is clocked by H14 divider of DPLL_GMAC. Unlike other
DPLL dividers this DPLL_GMAC H14 divider is controlled by
control module. Adding support for these clocks.

Signed-off-by: Lokesh Vutla <redacted>
Signed-off-by: Faiz Abbas <redacted>
---
 arch/arm/boot/dts/dra76x.dtsi | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi
index 1c88c58..bfc8263 100644
--- a/arch/arm/boot/dts/dra76x.dtsi
+++ b/arch/arm/boot/dts/dra76x.dtsi

@@ -17,3 +17,36 @@
 &crossbar_mpu {
 	ti,irqs-skip = <10 67 68 133 139 140>;
 };
+
+&scm_conf_clocks {
+	dpll_gmac_h14x2_ctrl_ck: dpll_gmac_h14x2_ctrl_ck@3fc {
+		#clock-cells = <0>;
+		compatible = "ti,divider-clock";
+		clocks = <&dpll_gmac_x2_ck>;
+		ti,max-div = <63>;
+		reg = <0x03fc>;
+		ti,bit-shift=<20>;
+		ti,latch-bit=<26>;
+		assigned-clocks = <&dpll_gmac_h14x2_ctrl_ck>;
+		assigned-clock-rates = <80000000>;
+	};
+
+	dpll_gmac_h14x2_ctrl_mux_ck: dpll_gmac_h14x2_ctrl_mux_ck@3fc {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clocks = <&dpll_gmac_ck>, <&dpll_gmac_h14x2_ctrl_ck>;
+		reg = <0x3fc>;
+		ti,bit-shift = <29>;
+		ti,latch-bit=<26>;
+		assigned-clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>;
+		assigned-clock-parents = <&dpll_gmac_h14x2_ctrl_ck>;
+	};
+
+	mcan_clk: mcan_clk@3fc {
+		#clock-cells = <0>;
+		compatible = "ti,gate-clock";
+		clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>;
+		ti,bit-shift = <27>;
+		reg = <0x3fc>;
+	};
+};

-- 
2.7.4

From: Franklin S Cooper Jr <redacted>

Add support for the MCAN peripheral which supports both classic
CAN messages along with the new CAN-FD message.

Add MCAN node to evm and enable it with a maximum datarate of 5 mbps

Signed-off-by: Franklin S Cooper Jr <redacted>
Signed-off-by: Sekhar Nori <redacted>
Signed-off-by: Faiz Abbas <redacted>
---
 arch/arm/boot/dts/dra76-evm.dts |  7 +++++++
 arch/arm/boot/dts/dra76x.dtsi   | 17 +++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/dra76-evm.dts b/arch/arm/boot/dts/dra76-evm.dts
index 2deb964..2777652 100644
--- a/arch/arm/boot/dts/dra76-evm.dts
+++ b/arch/arm/boot/dts/dra76-evm.dts

@@ -404,3 +404,10 @@
 	phys = <&pcie1_phy>, <&pcie2_phy>;
 	phy-names = "pcie-phy0", "pcie-phy1";
 };
+
+&m_can0 {
+	status = "okay";
+	can-transceiver {
+		max-bitrate = <5000000>;
+	};
+};

diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi
index bfc8263..71bd2a2 100644
--- a/arch/arm/boot/dts/dra76x.dtsi
+++ b/arch/arm/boot/dts/dra76x.dtsi

@@ -11,6 +11,23 @@
 / {
 	compatible = "ti,dra762", "ti,dra7";
 
+	ocp {
+		m_can0: mcan@42C01A00 {
+			compatible = "bosch,m_can";
+			reg = <0x42C01A00 0x4000>, <0x42C00000 0x18FC>;
+			reg-names = "m_can", "message_ram";
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "int0", "int1";
+			ti,hwmods = "mcan";
+			clocks = <&mcan_clk>, <&l3_iclk_div>;
+			clock-names = "cclk", "hclk";
+			bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
+			status = "disabled";
+		};
+	};
+
 };
 
 /* MCAN interrupts are hard-wired to irqs 67, 68 */

-- 
2.7.4

Hi,

* Faiz Abbas [off-list ref] [180408 09:59]:

Looks like you're missing the related struct omap_hwmod_class_sysconfig
entry for this with the rev and sysconfig registers.

Regards,

Tony

Hi Tony,

On Tuesday 01 May 2018 08:56 PM, Tony Lindgren wrote:

Hi,

* Faiz Abbas [off-list ref] [180408 09:59]:

quoted

From: Lokesh Vutla <redacted>

Add MCAN hwmod data and register it for dra762 silicons.

Signed-off-by: Lokesh Vutla <redacted>
Signed-off-by: Faiz Abbas <redacted>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 62352d1..a2cd7f8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c

@@ -1356,6 +1356,29 @@ static struct omap_hwmod dra7xx_mailbox13_hwmod = {
 };
 
 /*
+ * 'mcan' class
+ *
+ */
+static struct omap_hwmod_class dra76x_mcan_hwmod_class = {
+	.name	= "mcan",
+};

Looks like you're missing the related struct omap_hwmod_class_sysconfig
entry for this with the rev and sysconfig registers.

Sorry, I missed this email earlier. The MCAN module doesn't have
sysconfig registers.

Thanks,
Faiz

* Faiz Abbas [off-list ref] [180515 06:05]:

Hi Tony,

On Tuesday 01 May 2018 08:56 PM, Tony Lindgren wrote:

quoted

Hi,

* Faiz Abbas [off-list ref] [180408 09:59]:

quoted

From: Lokesh Vutla <redacted>

Add MCAN hwmod data and register it for dra762 silicons.

Signed-off-by: Lokesh Vutla <redacted>
Signed-off-by: Faiz Abbas <redacted>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 62352d1..a2cd7f8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c

@@ -1356,6 +1356,29 @@ static struct omap_hwmod dra7xx_mailbox13_hwmod = {
 };
 
 /*
+ * 'mcan' class
+ *
+ */
+static struct omap_hwmod_class dra76x_mcan_hwmod_class = {
+	.name	= "mcan",
+};

Looks like you're missing the related struct omap_hwmod_class_sysconfig
entry for this with the rev and sysconfig registers.

Sorry, I missed this email earlier. The MCAN module doesn't have
sysconfig registers.

If there's no sysconfig register you should have no need for adding
anything to omap_hwmod_7xx_data.c. We now have the dts clkctrl
clocks, you can just add that to the dts node for the device.

Regards,

Tony

* Faiz Abbas [off-list ref] [180408 09:59]:

From: Lokesh Vutla <redacted>

MCAN is clocked by H14 divider of DPLL_GMAC. Unlike other
DPLL dividers this DPLL_GMAC H14 divider is controlled by
control module. Adding support for these clocks.

Adding Tero to Cc on this one.

* Tony Lindgren [off-list ref] [180515 17:17]:

* Faiz Abbas [off-list ref] [180515 06:05]:

quoted

Hi Tony,

On Tuesday 01 May 2018 08:56 PM, Tony Lindgren wrote:

quoted

Hi,

* Faiz Abbas [off-list ref] [180408 09:59]:

quoted

From: Lokesh Vutla <redacted>

Add MCAN hwmod data and register it for dra762 silicons.

Signed-off-by: Lokesh Vutla <redacted>
Signed-off-by: Faiz Abbas <redacted>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 62352d1..a2cd7f8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c

@@ -1356,6 +1356,29 @@ static struct omap_hwmod dra7xx_mailbox13_hwmod = {
 };
 
 /*
+ * 'mcan' class
+ *
+ */
+static struct omap_hwmod_class dra76x_mcan_hwmod_class = {
+	.name	= "mcan",
+};

Looks like you're missing the related struct omap_hwmod_class_sysconfig
entry for this with the rev and sysconfig registers.

Sorry, I missed this email earlier. The MCAN module doesn't have
sysconfig registers.

If there's no sysconfig register you should have no need for adding
anything to omap_hwmod_7xx_data.c. We now have the dts clkctrl
clocks, you can just add that to the dts node for the device.

However.. My guess is there is somewhere a top level interconnect
target module that uses DRA7XX_CM_WKUPAON_ADC_CLKCTRL. And that
module may have multiple child devices.

Regards,

Tony

* Tony Lindgren [off-list ref] [180515 17:20]:

* Tony Lindgren [off-list ref] [180515 17:17]:

quoted

* Faiz Abbas [off-list ref] [180515 06:05]:

quoted

Hi Tony,

On Tuesday 01 May 2018 08:56 PM, Tony Lindgren wrote:

quoted

Hi,

* Faiz Abbas [off-list ref] [180408 09:59]:

quoted

From: Lokesh Vutla <redacted>

Add MCAN hwmod data and register it for dra762 silicons.

Signed-off-by: Lokesh Vutla <redacted>
Signed-off-by: Faiz Abbas <redacted>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 62352d1..a2cd7f8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c

@@ -1356,6 +1356,29 @@ static struct omap_hwmod dra7xx_mailbox13_hwmod = {
 };
 
 /*
+ * 'mcan' class
+ *
+ */
+static struct omap_hwmod_class dra76x_mcan_hwmod_class = {
+	.name	= "mcan",
+};

Looks like you're missing the related struct omap_hwmod_class_sysconfig
entry for this with the rev and sysconfig registers.

Sorry, I missed this email earlier. The MCAN module doesn't have
sysconfig registers.

If there's no sysconfig register you should have no need for adding
anything to omap_hwmod_7xx_data.c. We now have the dts clkctrl
clocks, you can just add that to the dts node for the device.

However.. My guess is there is somewhere a top level interconnect
target module that uses DRA7XX_CM_WKUPAON_ADC_CLKCTRL. And that
module may have multiple child devices.

And I'm guessing the top level module with sysconfig related
registers is named "adc" :)

Regards,

Tony

Hi Tony,

On Tuesday 15 May 2018 10:53 PM, Tony Lindgren wrote:

* Tony Lindgren [off-list ref] [180515 17:20]:

quoted

* Tony Lindgren [off-list ref] [180515 17:17]:

quoted

* Faiz Abbas [off-list ref] [180515 06:05]:

quoted

Hi Tony,

On Tuesday 01 May 2018 08:56 PM, Tony Lindgren wrote:

quoted

Hi,

* Faiz Abbas [off-list ref] [180408 09:59]:

quoted

From: Lokesh Vutla <redacted>

Add MCAN hwmod data and register it for dra762 silicons.

Signed-off-by: Lokesh Vutla <redacted>
Signed-off-by: Faiz Abbas <redacted>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 62352d1..a2cd7f8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c

@@ -1356,6 +1356,29 @@ static struct omap_hwmod dra7xx_mailbox13_hwmod = {
 };
 
 /*
+ * 'mcan' class
+ *
+ */
+static struct omap_hwmod_class dra76x_mcan_hwmod_class = {
+	.name	= "mcan",
+};

Looks like you're missing the related struct omap_hwmod_class_sysconfig
entry for this with the rev and sysconfig registers.

Sorry, I missed this email earlier. The MCAN module doesn't have
sysconfig registers.

If there's no sysconfig register you should have no need for adding
anything to omap_hwmod_7xx_data.c. We now have the dts clkctrl
clocks, you can just add that to the dts node for the device.

However.. My guess is there is somewhere a top level interconnect
target module that uses DRA7XX_CM_WKUPAON_ADC_CLKCTRL. And that
module may have multiple child devices.

And I'm guessing the top level module with sysconfig related
registers is named "adc" :)

Yes. The MCAN clocks are controlled by the ADC_CLKCTRL register.
Please see TRM:
http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=spruie9&fileType=pdf
page: 1530

Thanks,
Faiz

* Faiz Abbas [off-list ref] [180517 08:14]:

On Tuesday 15 May 2018 10:53 PM, Tony Lindgren wrote:

quoted

And I'm guessing the top level module with sysconfig related
registers is named "adc" :)

Yes. The MCAN clocks are controlled by the ADC_CLKCTRL register.
Please see TRM:
http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=spruie9&fileType=pdf
page: 1530

Thanks that helps :) Looks like we have:

MCANSS_PID      rev             0
MCANSS_CTRL     sysconfig       0x4
MCANSS_STAT     sysstatus       0x8

With current Linux next, this should work with just ti-sysc if
we added yet another sysconfig layout.. See

Documentation/devicetree/bindings/bus/ti-sysc.txt

Looks like this is not quite "ti,sysc-omap4" as there are no
ti,sysc-midle or ti,sysc-sidle, and sysstatus reset bit is
inverted..

Anyways, I think the dts part should be similar to this with
the new sysconfig added (untested):

target-module@42c00000 {
	compatible ="ti,sysc-yet-to-be-determined";
	ti,hwmods = "mcan";
	reg = <0x42c00000 4>,
	      <0x42c00004 4>,
	      <0x42c00008 4>;
	reg-names = "rev", "sysc", "syss";
	clocks = <&wkupaon_clkctrl CM_WKUPAON_ADC_CLKCTRL>;
	clock-names = "fck";
	ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET | SYSC_DRA7_ENAWAKEUP)>;
	ti,syss-mask = <1>;
	#address-cells = <1>;
	#size-cells = <1>;
	ranges = <0 0x42c00000 0x2000>;

	mcan@0 {
		compatible = "bosch,m_can";
		reg = <0x1a00 0x4000>,
		      <0 0x18fc>;
		reg-names = "m_can", "message_ram";
		interrupt-parent = <&gic>;
		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "int0", "int1";
		clocks = <&mcan_clk>, <&l3_iclk_div>;
		clock-names = "cclk", "hclk";
		bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
	};
};

You'd have to add a new struct sysc_regbits to ti-sysc.c similar
to sysc_regbits_omap4 for the .srst_shift = 0. Not sure if the same
register layout is used for other modules, but might be worth checking
the TRM. Also the clock node is missing for wkupaon_clkctrl from
include/dt-bindings/clock/dra7.h.

If the "message_ram" can operate independent of the driver,
it could be a separate child node under the target-module.

In the hwmod you still need the struct omap_hwmod for now,
but clocks should no longer be needed there.

Regards,

Tony

* Faiz Abbas [off-list ref] [180408 09:59]:

So based on the ti-sysc related dts comments, this patch should
work except you should be able to just leave out the clocks here
with the dts changes.

So the omap_hwmod_class, omap_hwmod_ocp_if and entry on the
dra76x_hwmod_ocp_ifs list are still needed with ti-sysc for a
while. Eventually that data will just come from the dts interconnect
hierarchy. For struct omap_hwmod_class_sysconfig, ti-sysc will
allocate and it based on the dts data.

Regards,

Tony

Hi Tony,

On Friday 18 May 2018 02:39 AM, Tony Lindgren wrote:

* Faiz Abbas [off-list ref] [180408 09:59]:

quoted

From: Lokesh Vutla <redacted>

Add MCAN hwmod data and register it for dra762 silicons.

Signed-off-by: Lokesh Vutla <redacted>
Signed-off-by: Faiz Abbas <redacted>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 62352d1..a2cd7f8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c

@@ -1356,6 +1356,29 @@ static struct omap_hwmod dra7xx_mailbox13_hwmod = {
 };
 
 /*
+ * 'mcan' class
+ *
+ */
+static struct omap_hwmod_class dra76x_mcan_hwmod_class = {
+	.name	= "mcan",
+};
+
+/* mcan */
+static struct omap_hwmod dra76x_mcan_hwmod = {
+	.name		= "mcan",
+	.class		= &dra76x_mcan_hwmod_class,
+	.clkdm_name	= "wkupaon_clkdm",
+	.main_clk	= "mcan_clk",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_WKUPAON_ADC_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_WKUPAON_ADC_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_SWCTRL,
+		},
+	},
+};

So based on the ti-sysc related dts comments, this patch should
work except you should be able to just leave out the clocks here
with the dts changes.

quoted

+/*
  * 'mcspi' class
  *
  */

@@ -3818,6 +3841,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per2__epwmss2 = {
 	.user		= OCP_USER_MPU,
 };
 
+/* l3_main_1 -> mcan */
+static struct omap_hwmod_ocp_if dra76x_l3_main_1__mcan = {
+	.master		= &dra7xx_l3_main_1_hwmod,
+	.slave		= &dra76x_mcan_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l3_main_1__dmm,
 	&dra7xx_l3_main_2__l3_instr,

@@ -3958,6 +3989,7 @@ static struct omap_hwmod_ocp_if *dra7xx_gp_hwmod_ocp_ifs[] __initdata = {
 /* SoC variant specific hwmod links */
 static struct omap_hwmod_ocp_if *dra76x_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l4_per3__usb_otg_ss4,
+	&dra76x_l3_main_1__mcan,
 	NULL,
 };

So the omap_hwmod_class, omap_hwmod_ocp_if and entry on the
dra76x_hwmod_ocp_ifs list are still needed with ti-sysc for a
while. Eventually that data will just come from the dts interconnect
hierarchy. For struct omap_hwmod_class_sysconfig, ti-sysc will
allocate and it based on the dts data.

Thanks for the detailed pointers. I will figure out the ti-sysc node
that needs to be added and post a v2.

Thanks,
Faiz