On Wed, Feb 28, 2018 at 4:47 PM, Geert Uytterhoeven
[off-list ref] wrote:

Hi Jassi,

On Tue, Feb 27, 2018 at 1:58 PM,  [off-list ref] wrote:

quoted

From: Jassi Brar <redacted>

This patch adds support for controller found on synquacer platforms.

Signed-off-by: Jassi Brar <redacted>

Thanks for your patch!

quoted

--- /dev/null
+++ b/drivers/spi/spi-synquacer.c

quoted

+static void read_fifo(struct synquacer_spi *sspi)
+{
+       u32 len = readl_relaxed(sspi->regs + DMSTATUS);
+       int i;

unsigned int, as len is unsigned.

quoted

+static void write_fifo(struct synquacer_spi *sspi)
+{
+       u32 len = readl_relaxed(sspi->regs + DMSTATUS);
+       int i;

unsigned int, as len is unsigned.

quoted

+static int synquacer_spi_config(struct spi_master *master,
+                               struct spi_device *spi,
+                               struct spi_transfer *xfer)
+{
+       struct synquacer_spi *sspi = spi_master_get_devdata(master);
+       unsigned int speed, mode, bpw, cs, bus_width;
+       unsigned long rate;

unsigned int, as max_speed_hz is u32, else you'll do a 64/32-bit division later.

quoted

+static int synquacer_spi_transfer_one(struct spi_master *master,
+                                     struct spi_device *spi,
+                                     struct spi_transfer *xfer)
+{
+       struct synquacer_spi *sspi = spi_master_get_devdata(master);
+       int ret, words, busy = 0;

unsigned int words, as xfr->len is unsigned.

quoted

+       unsigned long bpw;

unsigned int is plenty (bits_per_word is even u8).

Will fix all.

Thank you.