Re: [PATCH 01/14] dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings
From: Rob Herring <robh@kernel.org>
Date: 2018-02-05 06:11:13
Also in:
linux-arm-kernel, linux-clk, lkml
On Fri, Feb 02, 2018 at 03:03:29PM +0100, gabriel.fernandez@st.com wrote:
quoted hunk ↗ jump to hunk
From: Gabriel Fernandez <redacted> The RCC block is responsible of the management of the clock and reset generation for the complete circuit. Signed-off-by: Gabriel Fernandez <redacted> --- .../devicetree/bindings/mfd/st,stm32-rcc.txt | 85 ++++++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/st,stm32-rcc.txtdiff --git a/Documentation/devicetree/bindings/mfd/st,stm32-rcc.txt b/Documentation/devicetree/bindings/mfd/st,stm32-rcc.txt new file mode 100644 index 0000000..28017a1 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/st,stm32-rcc.txt@@ -0,0 +1,85 @@ +STMicroelectronics STM32 Peripheral Reset Clock Controller +========================================================== + +The RCC IP is both a reset and a clock controller. + +Please also refer to reset.txt for common reset controller binding usage. + +Please also refer to clock-bindings.txt for common clock controller +binding usage. + + +Required properties: +- compatible: "simple-mfd", "syscon"
+- reg: should be register base and length as documented in the datasheet
+
+- Sub-nodes:
+ - compatible: "st,stm32mp1-rcc-clk"
+ - #clock-cells: 1, device nodes should specify the clock in their
+ "clocks" property, containing a phandle to the clock device node,
+ an index specifying the clock to use.
+
+ - compatible: "st,stm32mp1-rcc-rst"
+ - #reset-cells: Shall be 1
+
+Example:
+ rcc: rcc@50000000 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x50000000 0x1000>;
+
+ rcc_clk: rcc-clk@50000000 {
+ #clock-cells = <1>;
+ compatible = "st,stm32mp1-rcc-clk";
+ };
+
+ rcc_rst: rcc-reset@50000000 {
You should not have the same unit-address twice.
IMO, this should just be:
rcc: rcc@50000000 {
compatible = "st-stm32mp1-rcc";
reg = <0x50000000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
There's no reason a node can't provide more than 1 function.
+ #reset-cells = <1>;
+ compatible = "st,stm32mp1-rcc-rst";
+ };
+ };
+
+Specifying clocks
+=================
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/stm32mp1-clks.h header and can be used in device
+tree sources.
+
+Example:
+
+ /* Accessing DMA1 clock */
+ ... {
+ clocks = <&rcc_clk DMA1>
+ };
+
+ /* Accessing SPI6 kernel clock */
+ ... {
+ clocks = <&rcc_clk SPI6_K>
+ };Other than the path to header, the clock binding explains all this. No need to duplicate here.
+
+Specifying softreset control of devices
+=======================================
+
+Device nodes should specify the reset channel required in their "resets"
+property, containing a phandle to the reset device node and an index specifying
+which channel to use.
+The index is the bit number within the RCC registers bank, starting from RCC
+base address.
+It is calculated as: index = register_offset / 4 * 32 + bit_offset.
+Where bit_offset is the bit offset within the register.
+
+For example on STM32MP1, for LTDC reset:
+ ltdc = APB4_RSTSETR_offset / 4 * 32 + LTDC_bit_offset
+ = 0x180 / 4 * 32 + 0 = 3072
+
+The list of valid indices for STM32MP1 is available in:
+include/dt-bindings/reset-controller/stm32mp1-resets.h
+
+This file implements defines like:
+#define LTDC_R 3072
+
+example:
+
+ ltdc {
+ resets = <&rcc_rst LTDC_R>;
+ };
--
1.9.1