[PATCH v2 2/3] dt-bindings: PCI: dra7xx: Add properties to enable x2 lane in dra7
From: Kishon Vijay Abraham I <hidden>
Date: 2017-12-19 08:58:51
Also in:
linux-omap, linux-pci, lkml
Subsystem:
open firmware and flattened device tree bindings, pci driver for ti dra7xx/j721e, pci native host bridge and endpoint drivers, pci subsystem, the rest · Maintainers:
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Vignesh Raghavendra, Lorenzo Pieralisi, Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas, Linus Torvalds
Add syscon properties required for configuring PCIe in x2 lane mode. Signed-off-by: Kishon Vijay Abraham I <redacted> Signed-off-by: Sekhar Nori <redacted> --- Documentation/devicetree/bindings/pci/ti-pci.txt | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
index 82cb875e4cec..bfbc77ac7355 100644
--- a/Documentation/devicetree/bindings/pci/ti-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt@@ -13,6 +13,12 @@ PCIe DesignWare Controller - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>", where <X> is the instance number of the pcie from the HW spec. - num-lanes as specified in ../designware-pcie.txt + - ti,syscon-lane-conf : phandle/offset pair. Phandle to the system control + module and the register offset to specify 1 lane or + 2 lane. + - ti,syscon-lane-sel : phandle/offset pair. Phandle to the system control + module and the register offset to specify lane + selection. HOST MODE =========
--
2.11.0