Re: [PATCH v2 07/13] dt-bindings: power: reset: Document ocelot-reset binding
From: Rob Herring <hidden>
Date: 2017-12-15 20:23:37
Also in:
linux-mips, linux-pm, lkml
On Fri, Dec 08, 2017 at 04:46:12PM +0100, Alexandre Belloni wrote:
quoted hunk ↗ jump to hunk
Add binding documentation for the Microsemi Ocelot reset block. Cc: Rob Herring <redacted> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Sebastian Reichel <redacted> Cc: linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Signed-off-by: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> --- .../devicetree/bindings/power/reset/ocelot-reset.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/reset/ocelot-reset.txtdiff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt new file mode 100644 index 000000000000..1bcf276b04cb --- /dev/null +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt@@ -0,0 +1,17 @@ +Microsemi Ocelot reset controller + +The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the +SoC MIPS core. + +Required Properties: + - compatible: "mscc,ocelot-chip-reset" + +Example: + syscon@71070000 { + compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon"; + reg = <0x71070000 0x1c>; + + reset { + compatible = "mscc,ocelot-chip-reset";
Why do you need a subnode here other than as a way to instantiate a driver? Can you describe the SOFT_RST register in reg property here (without having overlapping regions)? -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html