On 11/01/2017 06:09 PM, Florian Fainelli wrote:

On 11/01/2017 05:36 PM, David Daney wrote:

quoted

From: Carlos Munoz <redacted>

Add bindings for Common Ethernet Interface (BGX) block.

Signed-off-by: Carlos Munoz <redacted>
Signed-off-by: Steven J. Hill <redacted>
Signed-off-by: David Daney <redacted>
---

[snip]

quoted

+Properties:
+
+- compatible: "cavium,octeon-7360-xcv": Compatibility with cn73xx SOCs.
+
+- reg: The index of the interface within the BGX block.
+
+- local-mac-address: Mac address for the interface.
+
+- phy-handle: phandle to the phy node connected to the interface.
+
+- cavium,rx-clk-delay-bypass: Set to <1> to bypass the rx clock delay setting.
+  Needed by the Micrel PHY.

Is not that implied by an appropriate "phy-mode" property already?

I think you are correct.  That string never appears in the source code, 
so I am going to remove that property from the binding document for the 
next revision of the patch set.

Thanks,
David Daney