Re: [Ksummit-discuss] Devicetree Workshop at Kernel Summit Prague (26 Oct 2017)

Hi,

On 9.10.2017 22:39, Grant Likely wrote:

Kernel Summit is now just over 2 weeks away and it is time to pull
together the schedule for the Devicetree workshop. Originally I
planned on just an afternoon, but I've got the room for the whole day,
so I've got a lot of flexibility on the schedule. Unscheduled time can
be used for hacking.

Date: 26 Oct 2017
Time: 9:00am-5:30pm (Lunch from 12:30-2:30)
Location: Athens room - Hilton Prague

If you plan to attend, make sure you update your OSSunmitE/ELCE
registration to include the DT Workshop (log in to access and modify
your registration):

https://www.regonline.com/register/login.aspx?eventID=1883377&MethodId=0&EventsessionId=&Email_Address=&membershipID=

Here is my current list of topics in no particular order, including
the topic moderator:

Runtime memory consumption (Rob Herring)
Overlay maintenance plan (TBC)
Stable ABI for devicetree (TBC)
DT YAML encoding (Pantelis Antoniou)
DT Schema format - option 1 (Pantelis Antoniou)
DT Schema format - option 2 (Grant Likely)
Sharing Generic bindings (TBC)
devicetree.org update (Grant)

Reply to this email if you want to propose another topic.

Reply privately if there is a particular topic you want to attend but
you are unable to be there in the morning or afternoon. I'll put the
actual agenda together a week out from the event.

I would like to talk how to add support for AArch32 based on arm64 dts file.

And next topic is discuss criteria for adding new DTS board files to
kernel for supporting custom boards especially for arm32 which can end
up with a lot of dts files in this folder.
If make sense to permit only boards with something new or just enable
reference boards to go in.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs

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