[RESEND] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

Started by SZ Lin (林上智) on Oct 31, 2017

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quoted
Add QSPI node support, and this function is disabled by default This
setting could be overwritten in board-level definitions
Adding Shawn Guo.
This patch is modified based on https://patchwork.ozlabs.org/patch/492099/. The originator of this patch is Haikun Wang.
quoted
Signed-off-by: Haikun Wang <redacted>
quoted
Signed-off-by: SZ Lin <redacted>
Acked-by: Li Yang <redacted>
quoted
---
 arch/arm/boot/dts/ls1021a.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi
b/arch/arm/boot/dts/ls1021a.dtsi index 7bb9df2c1460..9da876e47810
100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -154,6 +154,20 @@
                        big-endian;
                };

+               qspi: quadspi@1550000 {
+                       compatible = "fsl,ls1021a-qspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x1550000 0x0 0x10000>,
+                             <0x0 0x40000000 0x0 0x40000000>;
+                       reg-names = "QuadSPI", "QuadSPI-memory";
+                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-names = "qspi_en", "qspi";
+                       clocks = <&clockgen 4 1>, <&clockgen 4 1>;
+                       big-endian;
+                       status = "disabled";
+               };
+
                esdhc: esdhc@1560000 {
                        compatible = "fsl,esdhc";
                        reg = <0x0 0x1560000 0x0 0x10000>;
--
2.14.1

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